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Visitor panfei
Visitor
2,202 Views
Registered: ‎02-01-2013

How to let MT18JSF51272AZ-1G4 run on 400MHz

Hi, everyone

 

 I am using the MT18JSF51272AZ-1G4 (DDR3-1333, 4GB, Dual Rank, EEC enabled UDIMM) on  xc6vhx380t-2ff1923. But the MIG3.92 only support 303.030MHz. How can I make it run on  400MHz?

 

Thanks!

 

 

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1 Reply
Xilinx Employee
Xilinx Employee
2,193 Views
Registered: ‎08-16-2007

Re: How to let MT18JSF51272AZ-1G4 run on 400MHz

You can adjust the MMCM multiply/divide values to achieve the 400MHz output clock. The following parameters will need to be changed in the top-level RTL file:

parameter CLKFBOUT_MULT_F = 16, // write PLL VCO multiplier.
parameter DIVCLK_DIVIDE = 8,          // write PLL VCO divisor.
parameter CLKOUT_DIVIDE = 2,        // VCO output divisor for fast (memory) clocks.
parameter nCK_PER_CLK = 2,          // # of memory CKs per fabric clock.
                                                                   // # = 2, 1.
parameter tCK = 1875,

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