12-09-2019 04:37 AM
I want to interface with the DDR4 memory in the PS side of xazu3eg-sfva625-1-i controller in UltraScale+ device family.
Can any one please give me the process how to accees these memory ? Or any document to follow through ?
Since am very new to vivado/sdk am not able to find the way to get go.
It would be great if any one help me in this regard. Please reply if any further details are needed.
Thanks in advance !!
12-09-2019 04:47 AM
Do you have to hardware-interface or do you have an existing hardware and your question is about software-interfacing?
For documents to browse, best is probably to use the Xilinx DocNav. All of them are there, you can search, filter, etc.
There isn't a single document, I'm afraid.
12-09-2019 05:07 AM
12-09-2019 05:38 AM
Ok, so you have a hardware, the Zynq and the DDR are there waiting for you, is that right?
In that case, the good news is you don't need to do anything.
It's a hard-processor, it's already there, perfectly laid out with dedicated peripherals to the DDR and a DDR controller in the middle.
Yes, you can use SDK. The flow I'm used to is:
1 - Open Vivado, create a project, create a block diagram, drop the Zynq PS core (plus maybe other cores).
2 - Configure (double click) the PS. For most boards, there is a configuration TCL that saves time and re-inventing the wheel
3 - Wrap the block diagram with a top level HDL (Vhdl/ Verilog)
4 - Build the bitstream, and 'export the hardware' (to SDK)
5 - Launch SDK from Vivado, it will pick up the hdf
6 - Create a BSP (most of the times the automatically created will do)
7 - Create an application project on SDK
8 - Enjoy programming, compile, debug, run, etc