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tarzanbs
Observer
Observer
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Registered: ‎08-15-2019

Is there FMC expansion board?

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Hello. I'am looking for verifying the designed memory logic of  a specific product('Fidelix’s LPDDR2').

So, I plan to make a LPDDR2 daughter board with FMC connector.

I looked at the FMC in my evaluation board of VCU118 that has enough IO to support a LPDDR2.

A couple of quetions is : 

1) I want if it is available or not to make LPDDR2 board with FMC ?

2) Is there FMC expansion board to reference ?

3) What document should i referenced?

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joancab
Teacher
Teacher
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Registered: ‎05-11-2015

Obviously, it is possible to make your board (chip shortage permitting). There is one important restriction: DDR pins cannot just be placed anywhere, you need to respect a series of rules regarding to which banks and byte lanes to use. So the very first thing to do before starting any PCB is to check whether the available pins in the main board's FMC are from banks and byte lanes allowing a DDR.

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joancab
Teacher
Teacher
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Registered: ‎05-11-2015

There are some FMC expansion boards but I've never seen/ heard of any with DDR, even less with DDR2 as most boards have DDR3 or DDR4

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tarzanbs
Observer
Observer
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Registered: ‎08-15-2019

I want to check the timing and verification of 'Fidelix's LPDDR2' like a calibrate and other specifications.

So, I should make a board using 'Fidelix's LPDDR2'.

I want to know if it is possible or not to make LPDDR2 board with FMC connector.

 

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joancab
Teacher
Teacher
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Registered: ‎05-11-2015

Obviously, it is possible to make your board (chip shortage permitting). There is one important restriction: DDR pins cannot just be placed anywhere, you need to respect a series of rules regarding to which banks and byte lanes to use. So the very first thing to do before starting any PCB is to check whether the available pins in the main board's FMC are from banks and byte lanes allowing a DDR.

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barriet
Xilinx Employee
Xilinx Employee
658 Views
Registered: ‎08-13-2007

It actually gets a bit more complicated than that:

-you need to implement the memory controller in the FPGA first as said
-then you need to see if the base board (VCU118 uses the US+ VU9P) even has all of these pins connected to the FMC connector
-DDRx interfaces have tight skew requirements on these signals
-so you'll have to measure from the gerber/.brd files these associated trace lengths and account for this on your FMC board for the total skew - which also likely limits what other boards can be supported.
-then there's the associated rail and termination voltage requirements for the memory.


I've seen a lot of FMC boards but can't remember one that supported a memory interface.

There there's the detail that US/US+ memory interface generator doesn't support DDR2 either so you'll have to worry about that challenge:
https://www.xilinx.com/support/documentation/ip_documentation/ultrascale_memory_ip/v1_4/pg150-ultrascale-memory-ip.pdf

There's perhaps a few other details here too that I'm initially overlooking.


But, again, every board I've seen that supports memory usually does it on the base board - probably for some of these reasons.

barriet
Xilinx Employee
Xilinx Employee
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Registered: ‎08-13-2007

I meant DDR2 or LPDDR2 - but that doesn't really change anything I wrote above.

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joancab
Teacher
Teacher
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Registered: ‎05-11-2015

@barriet , these are good points. "DDRx interfaces have tight skew requirements" - Well, DDR4, indeed. DDR3, less and DDR2 is even more permissive, almost forgiving.

@tarzanbs , actually, if the goal is to build some test rig for that memory, and you are going to make your PCB, you could just make the whole board with some Artix-7 or Spartan-7 that maybe support DDR2 (check needed). That would give you more freedom to choose pins, banks, voltages, etc. 

joancab
Teacher
Teacher
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Registered: ‎05-11-2015

"you'll have to measure from the gerber/.brd files these associated trace lengths"

Nope, physical length is not the thing to equalize/ control, but electrical length (i.e. delay). An inch of a straight trace does not delay the same as an inch of an accordion. Equating electrical length to physical length was okay for DDR2 where not every PCB designer had the tools and the difference didn't affect much, but for DDR3 and especially DDR4 one must use tools to measure electrical length.

We should actually stop talking about length when what matters is delay, but I don't have that much time to get and convince so many people.

barriet
Xilinx Employee
Xilinx Employee
633 Views
Registered: ‎08-13-2007

@joancab good points - thank you for chiming in.

There's quite a few older boards (e.g. 7 series as suggested) out there that support DDR2 or LPDDR2 (I don't have complete list or even a partial one handy) - ideally you could find one that was footprint compatible with the memory you are interested in perhaps.

But the short story is there's a number of challenges here. And we didn't even discuss US+ HP vs HD I/O, bank voltages/Vcco, SelectIO compatibility, PHY and controller implementation here (though alluded to above in the pg150 reference).