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Contributor
Contributor
538 Views
Registered: ‎03-23-2018

KC705 MIG example design on vivado 2018.3

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Hi,

- I just got KC705  board, and want to test its MIG example design on Vivado 2018.3. I am aware that it is suggested to test all example design on vivado 2014.3, but that version is too old, and most of Xilinx IPs we are using currently work on Vivado 2018.3 so I just want to try. 

So far, there is a MIG tutorial for vivado 2014.3, I used it as guide line for me to generate example design for 2018.3.

- I followed instruction from XTP196, go all the way to last step: generate IP, then my laptop crash. 

- I found AR #71898, and apply this patch, then I can generate MIG for KC705, then open Example Design successfully.

- Since I want to use MIG in block design with AXI interface, I create another project follow above steps, and it is crashed.

My questions are:

- Do we have any tutorial for KC705 MIG on newer Vivado?. Especially with AXI interface?

- Should I use Vivado 2014.3 for KC705 if I want to use MIG for its memory?, or any newer Vivado that MIG is running stable?

 

Thanks 

 

 

 

 

 

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Contributor
Contributor
459 Views
Registered: ‎03-23-2018

Re: KC705 MIG example design on vivado 2018.3

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Hi all,

- Once understand what XTP196 did on EXample Design, we can easily modify MIG Example Design for 2017.4  (and 2018.3 too) to make it work same as XTP96.

.- XTP196 did not do much work but bring out several signals from mig and data compare module to KC705 LEDs. In order to "merge" XTP project files to your current Deisgn Example, you just need to add led_display_driver.v and constrain file exampl_top.xdc to your project by "Add sources"and  "Add Constraint" option. After that, copy the instantiate led_display_driver module code at the end of XTP196 example_top.v to your current example_top.v, add led[3:0] signal to external then you should be able to synthesize the example design.

- Since MIG is working fine in 2018.3, I think I will use the latest Vivado for my project :)

- Good luck :)

 

 

 

1 Reply
Contributor
Contributor
460 Views
Registered: ‎03-23-2018

Re: KC705 MIG example design on vivado 2018.3

Jump to solution

Hi all,

- Once understand what XTP196 did on EXample Design, we can easily modify MIG Example Design for 2017.4  (and 2018.3 too) to make it work same as XTP96.

.- XTP196 did not do much work but bring out several signals from mig and data compare module to KC705 LEDs. In order to "merge" XTP project files to your current Deisgn Example, you just need to add led_display_driver.v and constrain file exampl_top.xdc to your project by "Add sources"and  "Add Constraint" option. After that, copy the instantiate led_display_driver module code at the end of XTP196 example_top.v to your current example_top.v, add led[3:0] signal to external then you should be able to synthesize the example design.

- Since MIG is working fine in 2018.3, I think I will use the latest Vivado for my project :)

- Good luck :)