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rohanmahapatra
Visitor
Visitor
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Registered: ‎11-06-2020

KCU1500 DDR4 Interface question

Hi,

I notice that the KCU1500 board has 4 DDR ranks (each 4 GB in size). The DDR4 SDRAM C1 9highlighted in the picture) does not have a C0_DDR4_S_AXI_CTRL interface while other three have the AXI_CTRL (AXI Lite) interface.

Can somehow tell me why?

 

Also, if I want to use just one rank then which one should I use? 

 

Also, if I want to use all 4 ranks then how should the address map look like?

fpga_ddr4_memory.PNG
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deepalir
Xilinx Employee
Xilinx Employee
324 Views
Registered: ‎02-21-2019

Hi @rohanmahapatra

Per UG1260 the 3 interfaces C0, C2 and C3 are 72-bit wide with ECC and interface C1 is 64-bits wide non-ECC. The CTRL interface is available when ECC is enabled.

The information for the ECC status and control registers on the AXI Lite interface can be found in PG150 starting on page 149. 

deepalir_0-1605576004168.png

 

 

 

 

 

 

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