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Registered: ‎10-13-2020

MIG DDR4 example design RDIMM M393A8K40B21-CTC

Hello Everyone,

I have faced with a problem of using MIG DDR4 controller "Example design" together with RDIMM M393A8K40B21-CTC.
I have a custom board with an XCKU060-2FFVA1156E and DDR4 DIMM. The board is done following the
recommendations from PG150.
The memory module is used not original Samsung, but NEMIX MR19200-944 64GB 2400MHz 2Rx4, which is a replica.

The problem is that the calibration of the MIG controller does not pass, same situation on several boards.
The error is shown: writing leveling "Could not find stable 0. Error found on Rank0, Byte 1".

The data lines on the PCB are aligned as follows:
The DIMM data bus is grouped by nibbles:
- address and command lines are aligned to the clock with a tolerance of +/- 1.19mm
- the length of the strobe lines dqs differ from the clocks by no more than +/- 22.4mm
- the data inside the nibbles is aligned to its gate with a tolerance of +/- 1.47mm
- clocks and strobes inside the diffpair are aligned with a tolerance of 0.15 mm
- the difference between the lengths of the conductors between the nibbles is in the range of 47.74mm
- the spread of the lengths of the conductors of nibbles lies in the range of 66mm-112mm

I checked the DIMM connection and voltages - everything seems to be in order.
There is no timing violations, no errors/critical warning, I'm using an example design with debug on.

Please, advise, what direction to look to solve the problem.


1 Reply
Registered: ‎08-21-2007

Please check the pinout of the DDR4 interface according to our board layout. Also refer to "hardware debug" section in the document pg150.

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