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Participant
Participant
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Registered: ‎11-11-2016

MIG PCB design guidelines documentation

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Good morning,

we are performing a rework of an in-house manufactured PCB on which a Kintex-7 xc7k325t-2ffg900i and five ISSI is46tr16256a-125kbla2 DDR3 memory modules were installed. We did not perform any signal integrity check due to lack of budget, and we experienced troubles with the MIG. More specifically, the DDR3 memory initialization phase never completed, stuck on the Write Calibration Phase.

Currently, we are planning to develop an updated version of the PCB, where the ISSI modules (formally not supported by the MIG IP core) will be replaced with the Micron MT41K256M16 module (MIG-supported) as a first step.

This is to kindly ask whether the following batch of documents is to be considered comprehensive for a successful PCB design and route phase on the DDR3 interface design:

  • ug483_7Series_PCB;
  • ug476_7Series_Transceivers;
  • ug475_7Series_Pkg_Pinout;
  • ug470_7Series_Config;
  • ds182_Kintex_7_Data_Sheet.

Thanks in advance,

best regards.

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Moderator
Moderator
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Registered: ‎11-09-2017

Re: MIG PCB design guidelines documentation

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Hi @eugeth20 

Also refer to UG586

-> Chapter 1 : Design guidelines DDR3 SDRAM

-> Appendix A:  General Memory Routing Guidelines.

https://www.xilinx.com/support/documentation/ip_documentation/mig_7series/v4_2/ug586_7Series_MIS.pdf

Regards
Pratap

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Moderator
Moderator
219 Views
Registered: ‎11-09-2017

Re: MIG PCB design guidelines documentation

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Hi @eugeth20 

Also refer to UG586

-> Chapter 1 : Design guidelines DDR3 SDRAM

-> Appendix A:  General Memory Routing Guidelines.

https://www.xilinx.com/support/documentation/ip_documentation/mig_7series/v4_2/ug586_7Series_MIS.pdf

Regards
Pratap

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Participant
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Registered: ‎11-11-2016

Re: MIG PCB design guidelines documentation

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Hello @rpr,

thanks for replying! We will add the UG586 to the batch. I will wait before closing the thread, just to see if any other idea comes up.

Regards.

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