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Visitor maanrl
Registered: ‎06-14-2011

ML310 and MIG 007

Hi, I'm trying to generate a DDR1 controller for the ML310 board with the MIG 007 tool, however when I try to use the Pin Editor to allocate the controller signals according to the board I always find that the tool sets a different group of pins for the strobe signals, for example on the ML310 layout the ddr_dqs[0] signal uses pin AG30 but the tool only allows to use it as a data signal. I've tried with and without the compatibility options (with 2vp20ff896) or even including more banks than necessary and the result is always the same. Does anybody know how to configure properly the tool?


My main concern is that of course the UCF file generated has incorrect information and I'm afraid that if I don't use an automatically generated file the design is not going to work. Please could somebody give some hints?





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Xilinx Employee
Xilinx Employee
Registered: ‎12-17-2007

Re: ML310 and MIG 007

I am going to move this so that the MIG group can help you out.

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Xilinx Employee
Xilinx Employee
Registered: ‎10-23-2007

Re: ML310 and MIG 007

It's possible that the ML310 board is not compatible with the capture scheme used by the design generated by MIG 007.  The rules of the MIG 007 for the DQS and associated DQ's cannot be violated.  It uses routing templates that depend on specific pins.  I do not have specific information on the ML310, so this might not be correct, but it is possible that this is the problem you are encountering.


However, other capture schemes are still possible such as a phase shifted 90 degree clock if your target frequency is low enough.  You might want to look for other techniques as used by EDK/MPMC for this board.

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