UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor petersbe
Visitor
396 Views
Registered: ‎03-04-2016

MPSOC support of 32gbit LPDDR4

Jump to solution

Does the MPSOC support 32gbit LPDDR4 MT53D1024M32D4DT-053 AIT to allow total memory size of 4GB.
This memory device is a quad die, dual-channel, dual-rank in x16 mode (2 ranks of 2x8Gbit die).

Vivado v2019.1 seems to indicate it, however it's not clear from UG1085 that it's supported.

MT53D1024M32D4.gif
MPSOC_DDR_config.gif
0 Kudos
1 Solution

Accepted Solutions
Highlighted
Moderator
Moderator
381 Views
Registered: ‎11-28-2016

Re: MPSOC support of 32gbit LPDDR4

Jump to solution

Hello @petersbe ,

Looking at the device data sheet this device is supported by the PS LPDDR4 controller.  I know a few designs that are using the MT53D512M32D2 device which is just the single rank version of the part you want to use.  Looking at the Processor Configuration Wizard (PCW) settings I would increase Precharge Time to 26 cycles to align with the tRPab spec.  Also you'll have to update the Row Address Count to 16-bits to align with the data sheet.  The last thing I would like to point out is the max data rate that will be supported by this configuration.  Since this is a dual rank topology you'll have to derate the interface by one speed grade so your max data rate is going to be 2133Mbps assuming you have a full speed package and a fast speed grade device.  You'll have to update the timing parameters since your tCK changed from 833ps to 938ps.  Here's a snippet from DS925 showing the max data rates for LPDDR4:
lpddr4_data_rates.PNG

View solution in original post

1 Reply
Highlighted
Moderator
Moderator
382 Views
Registered: ‎11-28-2016

Re: MPSOC support of 32gbit LPDDR4

Jump to solution

Hello @petersbe ,

Looking at the device data sheet this device is supported by the PS LPDDR4 controller.  I know a few designs that are using the MT53D512M32D2 device which is just the single rank version of the part you want to use.  Looking at the Processor Configuration Wizard (PCW) settings I would increase Precharge Time to 26 cycles to align with the tRPab spec.  Also you'll have to update the Row Address Count to 16-bits to align with the data sheet.  The last thing I would like to point out is the max data rate that will be supported by this configuration.  Since this is a dual rank topology you'll have to derate the interface by one speed grade so your max data rate is going to be 2133Mbps assuming you have a full speed package and a fast speed grade device.  You'll have to update the timing parameters since your tCK changed from 833ps to 938ps.  Here's a snippet from DS925 showing the max data rates for LPDDR4:
lpddr4_data_rates.PNG

View solution in original post