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Observer
Observer
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Registered: ‎10-30-2018

Measuring the Burst Length against the achievable bandwidth on PYNQ-Z1

To the Xilinx forum,

Recently, I've read a lot of articles about measuring the memory bandwidth and the burstlength on FPGA.

Such as this from the Caffeine, 2016.

註解 2020-02-14 172500.png

 

I am wondering is this possible to run such experiment on entry-levl FPGA such as PYNQ-Z1?

and How?

I mean, most of the article does not even describe how the block diagram looks like? Is this from the official tutorial

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