To the Xilinx forum,
Recently, I've read a lot of articles about measuring the memory bandwidth and the burstlength on FPGA.
Such as this from the Caffeine, 2016.
I am wondering is this possible to run such experiment on entry-levl FPGA such as PYNQ-Z1?
I mean, most of the article does not even describe how the block diagram looks like? Is this from the official tutorial