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Contributor
Contributor
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Registered: ‎12-03-2018

Memory Interface Generator

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Hi,

Can someone tell me what is the most DDR3 memory (in GBytes) that the MIG can support?

I am trying to determine if I can build a board around an FPGA that will have access to 64Gbytes (or more) of DDR3 memory.

Thanks,
Dan

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Xilinx Employee
Xilinx Employee
203 Views
Registered: ‎07-16-2019

Re: Memory Interface Generator

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Hi Dan,

For the Zynq-7000 SoC and 7 series devices:

     DDR3 SDRAM Features:

          1, 2, 4, & 8 Gb density device support 

     RLDRAM3 3 Features: 

          576 Mb & 1152 Mb density device support

      https://www.xilinx.com/support/documentation/ip_documentation/mig_7series/v4_2/ds176_7Series_MIS.pdf

 

For the UltraScale Architecture Based FPGAs:

     DDR3 SDRAM: Support densities up to 8 Gb for components, 32 GB for RDIMMs, 16 GB for SODIMMs, and 16 GB for                                         UDIMMs. Other densities for memory device support is available through custom part selection

     https://www.xilinx.com/support/documentation/ip_documentation/ultrascale_memory_ip/v1_4/pg150-ultrascale-memory-ip.pdf

 

I hope that helps!

Ebrahim

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Xilinx Employee
Xilinx Employee
204 Views
Registered: ‎07-16-2019

Re: Memory Interface Generator

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Hi Dan,

For the Zynq-7000 SoC and 7 series devices:

     DDR3 SDRAM Features:

          1, 2, 4, & 8 Gb density device support 

     RLDRAM3 3 Features: 

          576 Mb & 1152 Mb density device support

      https://www.xilinx.com/support/documentation/ip_documentation/mig_7series/v4_2/ds176_7Series_MIS.pdf

 

For the UltraScale Architecture Based FPGAs:

     DDR3 SDRAM: Support densities up to 8 Gb for components, 32 GB for RDIMMs, 16 GB for SODIMMs, and 16 GB for                                         UDIMMs. Other densities for memory device support is available through custom part selection

     https://www.xilinx.com/support/documentation/ip_documentation/ultrascale_memory_ip/v1_4/pg150-ultrascale-memory-ip.pdf

 

I hope that helps!

Ebrahim