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Participant selwyn
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8,279 Views
Registered: ‎08-13-2015

Memory access

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Hi,

 

  I want to pass some data to store in block ram and extract out for other usage. Is it possible to access the block ram without using block ram controller? Same for ddrx ram, if i am to access the ddrx memory, do i definely need the aid of the memory interface generator to access? Is it possible to access the memory directly without the controller aid? 

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Participant pete_128
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15,936 Views
Registered: ‎04-02-2016

Re: Memory access

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For the BRAM, it has a reasonably intutitive interface on the RTL level for even the prmitive component. So the short answer for BRAM is no, you do not have the use controllers if you dont want to. If you are writing HDL you can follow an instantiation template and use the component interface for access.

 

For DDR, its waaaaaaay harder.

 

Stepping back, what is the problem you are trying to solve by dumping the controllers? AXI is a simple and uniform interface you can use consistently for both once you have the two controllers.

Anyways, if you dump the MIG, you need to control DDRs raw interface which is very complex and a timing nightmare. You would shortly find whatever you came up with was a new DDR controller in its own right. If you are just trying to save logic, perhaps the DDR "native" interface is what you are looking for. It is a different protocol to AXI that is slightly simpler. At then end the day though, it's still MIG.

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Participant pete_128
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Registered: ‎04-02-2016

Re: Memory access

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For the BRAM, it has a reasonably intutitive interface on the RTL level for even the prmitive component. So the short answer for BRAM is no, you do not have the use controllers if you dont want to. If you are writing HDL you can follow an instantiation template and use the component interface for access.

 

For DDR, its waaaaaaay harder.

 

Stepping back, what is the problem you are trying to solve by dumping the controllers? AXI is a simple and uniform interface you can use consistently for both once you have the two controllers.

Anyways, if you dump the MIG, you need to control DDRs raw interface which is very complex and a timing nightmare. You would shortly find whatever you came up with was a new DDR controller in its own right. If you are just trying to save logic, perhaps the DDR "native" interface is what you are looking for. It is a different protocol to AXI that is slightly simpler. At then end the day though, it's still MIG.

View solution in original post

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