Output Driver Impedance Control DDR4 ultrascale

[fcaldi@92]

Hi,

     I've seen that in the MIG tool for ultrscale devices is no more present the window that allows to view available values and select the Output Driver Impedance Control (and so the corresponding Output Driver Strength written in memory MR register 1). So my question is if is possible to modify the value to use one different from the default or if I'm forced to use the default value

[kshimizu · Accepted solution]

Hello　fcaldi@92 ,

MR_x registers is in the RTL inside the MIG IP, so it is possible to change the value. Note that Xilinx has evaluated the default value, so it is out of the support if  it is changed.  We recommend using the default value.

Best regards,

Kshimizu

Product Application Engineer Xilinx Technical Support

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[kren]

Yes, you can modify it while default value is strongly recommended. Please run board-level simulation to ensure signal integrity.

[Mahender]

   Sir,

     can you briefly explain what XTP514 does and what does a MIG do, how it communicates with dram or its we specify some location of anything?

     and also does MIG have addressing and what kind of samples does MIG store, is width of all configurable and can we pick data from any location we wish..?

     can you please help me with answers if possible..?

                                    Thank you sir..!