01-14-2019 10:06 AM - edited 01-16-2019 05:25 AM
I've been attempting to simulate MIG series 7 in modelsim.
At first I took the entire MIG generated RTL from my vivado project. I was able to run it successfully using the provided test bench and traffic generator. The design has finished calibration and successfully performed read and write operations using the MIG controller.
My end goal is to use the RTL in PHY-only setup and incorporate my own design for controller, so next I attempted to remove the logic which I will not use. I removed instances one by one, and once I removed the memory controller logic itself (mig_7series_v4_1_mc and below), I see that the PHY fails to finish calibration.
I've narrowed the issue down to the u_ddr_phy_wrcal module: after starting, at a certain point it's "match" inputs get Xs and its state machine (cal2_state_r) goes to CAL2_ERR. I failed to follow the signals and understand why this occurs.
Please note that in this case, the only difference between a fully running simulation and this issue is me removing the controller logic. Shouldn't the PHY calibration logic be independent of the controller?
Your assistance will be much appreciated.
01-16-2019 11:03 PM
You can learn from the attachment for PHY only design which you can found at https://www.xilinx.com/support/answers/51204.html .
01-20-2019 12:55 PM
Thank you for your response.
I am familiar with the attachment, yet I can't see anything in the document referring to my issue. The only thing I found related to the calibration is the section listing the signals from the controller to the calibration block, but they lack a description of their purpose in the process.
Is there any another document detailing the part of the controller in the calibration? This is pretty low level and I couldn't find this kind of description in the MIS7 document either.