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lalithkumar
Adventurer
Adventurer
5,219 Views
Registered: ‎06-16-2016

To interface QDRll with Virtex 7 MIG (QDR ll+) as core

Hi I'm Lalith,

                    I need to interface QDR || memory (144mb , 4 word burst) with Virtex 7 , when I gone through MIG of Virtex7 ,

there is only "QDR ||+" memory option, not " QDR ||".

 

Is it possible to interface only QDR || (not QDR ||+) to Virtex 7 using MIG as "QDR || + core".

 

If it is then what all changes has to be done while creating MIG and is there any chances of coming  issue (timing issue or any other) after connecting QDR || memory to my Virtex 7. 

 

Please Help me to find proper solution to above said ,I'm looking for your reply.

 

Thank you

-Lalith

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vsrunga
Xilinx Employee
Xilinx Employee
5,138 Views
Registered: ‎07-11-2011

@lalithkumar

 

I think it is answered here 

https://forums.xilinx.com/t5/7-Series-FPGAs/Interfacing-the-QDR-ll-with-Virtex-7-QDR-ll-MIG/m-p/704658

 

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