11-17-2020 11:58 AM
I am getting read data errors with the Ultrascale MIG IP. Any help would be welcome. Here are some details :
- using MIG 2.2 Rev.9 with Vivado 2020.1
- using two 64-bit MIG, each connected to four x16 components running at 1200 MHz
- no timing violations reported in Vivado
- I see the errors with Kintex Ultrascale KU060; not getting errors on same board but with KU035
- the errors are on the reads; all 8 dq bits of a dqs group are inverted; on 1 or 2 bytes of the 8-byte burst
- the errors show up after a calibration; if I rerun calibration, I can run all night without any error
- the calibration always completes successfully; the margins look similar between calibrations that produce and don't produce errors
- I am using the Data Mask and DBI Read option of the MIG; if I remove the DBI Read option, I don't get any error
11-19-2020 12:05 AM
Was the data error only found after first calibration at power-on? Did you test on KU060 and KU035 with the same bitstream?
11-19-2020 05:19 AM
No, the data error is not found only after power-on. After power-on, resetting the MIG to force a re-calibration makes the error appear or disappear.
I have not used the exact same bitstream in KU060 and KU035 (is that possible?). But I have seen the error with multiple KU060 bitstreams, and I have tried multiple different KU035 bitstreams without seeing the error. Both devices use the same MIG.
11-23-2020 01:24 AM
The DDR4 IP should be reset after the system clock get stable. Was the system clock of DDR4 IP stable after pwoer on?
11-23-2020 05:44 AM
Check within your MIG source code if CAL_RDLVL_DBI is set to SKIP.
Within the MIG I am currenly working with it is so.
That means that no read leveling is done on DM_DMI bits.
11-23-2020 06:09 AM
Thank you for the advise but the CAL_RDLVL_DBI parameter is set correctly. Also I can see in the MIG calibration FSM in Vivado Hardware Manager that the DBI calibration steps are 'PASS'.
11-30-2020 01:02 AM
So after power-on,if there's no reset on MIG IP, after calibration you will get the read data error. If these are all the facts, the problem should be on the reset. MIG IP must be reset after power-on that resets the entire memory design which includes general interconnect (fabric) logic which is driven by the MMCM clock (clkout0) and RIU logic.
11-30-2020 01:47 PM
The problem does not seem to be related to power-on. Let me try to explain in a different way. After the board power is on, system clock is stable, MIG calibration is completed, and memory reads are working fine, this is the sequence I run to reproduce the problem:
wait for end of calibration
write to memory
read back from memory
check for memory read errors
11-30-2020 02:11 PM
What kind of board are you using ? Xilinx evaluation board or your own designed board ?
It seems (read) leveling issue or eye window issue or clock jitter issue or power noise issue.
Did you make sure them, if your board is your own design board ?
12-01-2020 05:36 AM
This is with our own board. But like I mentioned, the same board but with a KU035 doesn't show the problem.
Also, after a calibration that doesn't result in errors, I can read from memory for many hours without any error.
12-01-2020 04:04 PM
>I can read from memory for many hours without any error.
As I already mentioned before, it seems noise issue or calibration issue.
I suggest you to read Micron's technical document about ZQCAL, if you want to know mechanism.
So, would you make sure them ?