cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Adventurer
Adventurer
256 Views
Registered: ‎05-19-2014

Unbuffered Additional User Clocks from UltraScale Memory IP

Jump to solution

The IP Cores provided for UltraScale memory controllers (PG150) allow generate up to four additional user clocks from the existing internal MMCM. The IP core proactively instantiates `BUFG`s for each of these clocks. Is there - in analogy to disabling the `BUFG` insertion on the input clock path - a non-intrusive IP core option to prevent these `BUFG` instantiations on these additional user clock outputs so that a custom, possibly more capable `BUFG` variant, such as a `BUFGCE` or a `BUFGCTRL`, may be chosen?

0 Kudos
Reply
1 Solution

Accepted Solutions
Moderator
Moderator
206 Views
Registered: ‎08-21-2007

This feature is not supported within the IP wizard. However, you can modify it according to your requirement in the generated RTL.

-----------------------------------------------------Please don't forget to give kudos or accept as solution if information provided is helpful.---------------------------------------------------------------------

View solution in original post

0 Kudos
Reply
1 Reply
Moderator
Moderator
207 Views
Registered: ‎08-21-2007

This feature is not supported within the IP wizard. However, you can modify it according to your requirement in the generated RTL.

-----------------------------------------------------Please don't forget to give kudos or accept as solution if information provided is helpful.---------------------------------------------------------------------

View solution in original post

0 Kudos
Reply