02-21-2019 12:47 PM
Hi, I am new in the FPGA area. I want to Write and Read data between the FPGA of the kc705 board and the DDR3 memory. I've been reading some documents related to a Memory Controller but I found that they are very large and complex to understand. Would you help with some documents or advises that had helped you making a task like I've just mentioned?
02-21-2019 02:30 PM
Would you refer the following URL ?
Also, I recommend to use MIG IP to access DDRx SDRAM. MIG is (DRAM) memory controller and you can access DRAM via AXI4 interface and so on.
02-21-2019 05:32 PM
You can start with the DDR3 example design for KC705 at: https://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html#documentation.