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Edocit
Visitor
Visitor
399 Views
Registered: ‎05-21-2021

ZCU102 GPIO using registers

Hi everyone,

 

I was trying to drive GPIO pins of ZCU102 as digital outputs.

I decideded to test on the header j87 pin 1 that is D20 mapped on GPIO_34 (or MIO34) in bank_1. The pin was configured from Vivado as "inout".

In Vivado I have the following J87 pin1 or D20 that is PS_MIO_34J87 pin1 or D20 that is PS_MIO_34physical connection on MIO_34physical connection on MIO_34

In Vitis I did the following 

 

 

 

 

 

#define LEDS_ADDRESS    0xA0000000

#define OEN_1 			(0xFF0A0000 + 0x00000248)
#define DIRM_1			(0xFF0A0000 + 0x00000244)
#define DATA_1  		0xFF0A0044
#define DATA_1_RO		(0xFF0A0000 + 0x00000064)
#define MIO_MST_TRI1	 0xFF180208
#define MASK_DATA_1_LSW (0xFF0A0000 + 0x00000008)
#define MASK_DATA_1_MSW (0xFF0A0000 + 0x0000000C)

uint32_t dat;

int main()
{
    init_platform();

    *(uint32_t *)DIRM_1 |= 0xFFFF;
    *(uint32_t *)OEN_1  |= 0xFFFF;
    *(uint32_t *)MIO_MST_TRI1  |= 0x0000;
 
     while(1){
	    *(uint32_t *)DATA_1 |= 0xFFFFFFFF;
	    sleep_A53(1);
	    dat = *(uint32_t *)DATA_1;
	    printf("Output reg data: %d\n", dat);
	    *(uint32_t *)DATA_1 &= 0x00000000;
	    sleep_A53(1);
	    dat = *(uint32_t *)DATA_1;
	    printf("Output reg data:  %d\n", dat);
	    sleep_A53(1);
    }

    cleanup_platform();
    return 0;
}

 

 

 

 

 

But the voltage read on the pin (and all other pin of j87 excluded Vcc and Gnd) is always 0  while the code correctly prints alternating values of 65535 and 0 for the memory location with address DATA_1

 

Can someone figure out what I did wrong ? or what config register I missed ?

 

Thank you.

Best, 

Edoardo 

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2 Replies
stephenm
Xilinx Employee
Xilinx Employee
381 Views
Registered: ‎09-12-2007

Are you missing the DATAMASK:

mask.PNG

 

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Edocit
Visitor
Visitor
376 Views
Registered: ‎05-21-2021

Hi thank you for the answer.

Since i wrote DATA_1, the full 32bit register for BANK_1, shouldn't be redundant to write only on 16bit again?

Schermata da 2021-05-21 11-38-38.png

Given that the GPIO taken as an example is GPIO34 (aka PMOD1_0), shouldn't it be (in case it is necessary to use it) the upper part of the register and therefore MASK_DATA_MSW ?Schermata da 2021-05-21 11-35-13.png

Thanks again,
Edoardo

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