cancel
Showing results for 
Search instead for 
Did you mean: 
Newbie
Newbie
102 Views
Registered: ‎03-25-2020

Zynq-7000 AP SoC DRAM Diagnostics Test hangs

I ran the Zync example memory test from <SDK installation directory>\data\embeddedsw\lib\sw_apps\zynq_dram_test\src

https://www.xilinx.com/html_docs/xilinx2019_1/SDK_Doc/SDK_references/sdk_u_zynq_dram.html

I'm testing on the Micron LPDDR2 SDRAM (EDB2432B4) 2Gb/2KB page size. The test runs fine for 1 MB, 32 MB, 64 MB test but from 128MB test on-wards the test is stuck and I see the ... printed and nothing happens.  Any ideas why this would hang?

-----------------------------------------------------------------
------------------- ZYNQ DRAM DIAGNOSTICS TEST ------------------
-----------------------------------------------------------------
Select one of the options below:
## Memory Test ##
Bus Width = 16, XADC Temperature = 52.9849
's' - Test 1MB length from address 0x100000
'1' - Test 32MB length from address 0x100000
'2' - Test 64MB length from address 0x100000
'3' - Test 128MB length from address 0x100000
'4' - Test 255MB length from address 0x100000
'5' - Test 511MB length from address 0x100000
'6' - Test 1023MB length from address 0x100000
## Read Data Eye Measurement Test
'r' - Measure Read Data Eye
## Write Data Eye Measurement Test
'i' - Measure Write Data Eye
Other options for Write Eye Data Test:
'f' - Fast Mode: Toggles Fast mode - ON/OFF
'c' - Centre Mode: Toggles Centre mode - ON/OFF
'e' - Vary the size of memory test for Read/Write Eye Measurement tests
## Data Cache Enable / Disable Option:
'z' - D-Cache Enable / Disable
## Other options
'v' - Verbose Mode ON/OFF

Option Selected : 3


Starting Memory Test '3' - Testing 128MB length from address 0x100000...
------------------------------------------------------------------------------------------
TEST WORD ERROR PER-BYTE-LANE ERROR COUNT TIME
COUNT [ LANE-0 ] [ LANE-1 ] [ LANE-2 ] [ LANE-3 ] (sec)
------------------------------------------------------------------------------------------
...

Test procedure writes the following patterns to memory.
Sub-test Description
0 Incrementing pattern, unique value per memory location (data = address)
1 All 0
2 All 0xffffffff
3 All 0xAAAAAAAA
4 All 0x55555555
5 Alternating 0x00000000 and 0xFFFFFFFF
6 Alternating 0xFFFFFFFF and 0x00000000
7 Alternating 0x55555555 and 0xAAAAAAAA
8 Alternating 0xAAAAAAAA and 0x55555555
9 Aggressor pattern identical on all 8 bits
10 Aggressor pattern with one bit inverted, x8 times (1 per bit)
11-14 Pseudo random patterns with different seeds

0 Kudos