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liviamoro
Visitor
Visitor
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Registered: ‎04-28-2020

Zynq Ultrascale + DDR3 PS 16 bit configuration

Hi everybody,

we have already designed our custom board based on ZYNQ Ultrascale + XCZU9EG-2FFVB1156E.

For a design error, we are using only a 16 bit DDR3 as PS memory: IS43TR16256B-093NBLI.

This is our first project, and now we realized that only 32 bit or 64-bit data width is supported for PS DDR3 and that 16 bit is supported only for DDR4.

Now, without the DDR3 controller, the Helloworld project is working properly, but with the ddr3 controller, I am not able to run any application project.

In the design is also present a PL DDR3 memory of the same type: IS43TR16256B-093NBLI.

Is there a workaround to make it work? Maybe with different settings, some connections between PS and PL pins, or changing some files in Vitis.

Thanks,

Livia

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kshimizu
Xilinx Employee
Xilinx Employee
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Registered: ‎03-04-2018

Hello @liviamoro ,

 

As you pointed that out, DDR3 is not supported 16bits in UG1085.  Unfortunately, there aren’t any workaround on this at this time.

 

 

Best regards,

Kshimizu

 

Product Application Engineer Xilinx Technical Support

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liviamoro
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Registered: ‎04-28-2020

Hello @kshimizu ,

thank you for your feedback. According to you, is it possible to use the PL DDR as the main memory, and map everything there and in the FPGA embedded memories?

In our application, we have some AXI peripherals and we use GEM Ethernet interface. We also use a DMA to talk between PS and PL.

Thank you, best regards,

Livia

 

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