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Explorer
Explorer
7,407 Views
Registered: ‎05-03-2012

ck_p/n[1] absent for dual rank DDR3

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After generating MIG2.3 in Vivado 2014.4 and 2015.3 I have cs_n[0] and cs_n[1], odt[0] and odt[1], cke[0] and cke[1]

but only one ck_p/n[0] in xdc.

 

Here you can see fly-by that needs two clocks: CK0 and CK1

https://www.micron.com/~/media/Documents/Products/Data%20Sheet/Modules/Unbuffered_DIMM/jtf16c256_512_1gx64az.pdf

 

Where should I get CK1?

 

Thank you.

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Xilinx Employee
Xilinx Employee
14,096 Views
Registered: ‎07-11-2011

@mikerez

 

The datasheet you referred is for DIMM, but you have slected component, please select memory type as UDIMM, choose dual rank part and recheck the xdc

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Xilinx Employee
Xilinx Employee
7,404 Views
Registered: ‎07-11-2011

@mikerez

 

What memory devie are you uisng?

Can you uplod your mig.prj, .xml and .xdc files to check at our end?

---------------------------------------------------------------------------------------------
Please do google search before posting, you may find relavant information.
Mark the post - "Accept as solution" and give kudos if information provided is helpful and reply oriented
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Explorer
Explorer
7,401 Views
Registered: ‎05-03-2012
 
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Highlighted
Xilinx Employee
Xilinx Employee
14,097 Views
Registered: ‎07-11-2011

@mikerez

 

The datasheet you referred is for DIMM, but you have slected component, please select memory type as UDIMM, choose dual rank part and recheck the xdc

---------------------------------------------------------------------------------------------
Please do google search before posting, you may find relavant information.
Mark the post - "Accept as solution" and give kudos if information provided is helpful and reply oriented

View solution in original post

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Explorer
Explorer
7,380 Views
Registered: ‎05-03-2012

Hi 

 

thank you, I missed this. This right.

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