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murali@1996
Contributor
Contributor
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Registered: ‎10-03-2018

error[Common 17-37] while implementing DDR4 MIG in VIVADO2016.4

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Hi,

I was Tried to implement the DDR4 interface in the Kintex ultra scale with VIVADO2016.4 for the SDRAM(MT40A512M16HA-083E)

during the implementation the below error was came, Can any one help me to resolve the issue..?

 

 

  • [Common 17-37] Directory in which file u_mig_ddr3_phy_phy.xdc is to be written does not exist [C:/Users/itsadmin/AppData/Local/Temp/7264/project_1/u_ddr3_mem_intfc]
  • [Common 17-69] Command failed: ERROR: [Common 17-37] Directory in which file u_mig_ddr3_phy_phy.xdc is to be written does not exist [C:/Users/itsadmin/AppData/Local/Temp/7264/project_1/u_ddr3_mem_intfc]

 

regards

Murali

DDR4_ERROR.png
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johnvivm
Voyager
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Registered: ‎08-16-2018

murali@1996

Check this: open Vivado (with no project open). Click Tools > Settings. Then 'Project' in the left panel. Check the default directory not to be a 'special' one restricted by the OS.

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johnvivm
Voyager
Voyager
2,123 Views
Registered: ‎08-16-2018

Strange it goes to AppData/Local/Temp to look for those files...

Have you created your project in a 'normal' place, like C:/projects or in your username folder?

 

Could it be you have your project in a user space (itsadmin) with admin rights and you are launching Vivado with another user without those superpowers?

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murali@1996
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Registered: ‎10-03-2018

Actually the Design folder and all the sources are in D:/folder/folder/... only...! not in C:/user/itsadmin/......,.

 

while running implementation a new temp folder is automatically created. in that folder it was expecting the .XDC file...

don't know why...

 

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murali@1996
Contributor
Contributor
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Registered: ‎10-03-2018

I have tried to RUN with admin rights. and tried with different PC's also. but the Same error is came again and again. then What will be the problem...?

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johnvivm
Voyager
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Registered: ‎08-16-2018

There must be something wrong with the project settings... could you start a new project in another folder and copy all your sources and constraints?

murali@1996
Contributor
Contributor
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Registered: ‎10-03-2018

Yes,

Actually I was created the new project only for DDR3/DDR4 and Compiled. there is no other files in that. even-though the Error remains...!

 

regards

Murali

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johnvivm
Voyager
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Registered: ‎08-16-2018

murali@1996

Check this: open Vivado (with no project open). Click Tools > Settings. Then 'Project' in the left panel. Check the default directory not to be a 'special' one restricted by the OS.

View solution in original post

murali@1996
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Registered: ‎10-03-2018

yes, Thanks...!

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.@.@.v.@.@.
Contributor
Contributor
1,282 Views
Registered: ‎09-25-2017

I'm having the exact same issue; I don't see the chain of options that you suggested. 

 

Can you provide screen shots? 

yunleiz
Xilinx Employee
Xilinx Employee
626 Views
Registered: ‎05-10-2018
how to do when using the terminal flow?
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