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sf
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Registered: ‎06-17-2020

should be high impedance on signal but showing 1 in ILA

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Hi,

I am working on a sd card protocol and I have some tri-state signals for it like sd_cmd and sd_data.

 

so the design is like: 

 

module top ( inout sd_cmd, ...)

assign sd_cmd = sd_cmd_oe ? sd_cmd_o : 1'bz;

 

so the sd_cmd signal is sd_cmd_o when the enable signal 'sd_cmd_oe' is high. sd_cmd is 1'bz when sd_cmd_oe is low.

It works fine in simulation but when testing on board, ILA ( integrated logic analzyer) shows sd_cmd signal's input buffer is 1 when sd_cmd_oe is low.

I am wondering if there is a way to have 1'bz value on the signal or value 1 is just what it is in this case.

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bruce_karaffa
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Registered: ‎06-21-2017

An ILA is nothing more than some BRAM, address counters and trigger logic.  It sits inside the FPGA and only sees core logic levels.

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bruce_karaffa
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Registered: ‎06-21-2017

There are no high impedance signals inside the FPGA, only on the pins.

sf
Visitor
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Registered: ‎06-17-2020

yeah I know what you mean. I am wondering though if I can use ILA to get the pin value, it seems to me ILA only gives input buffer value of the port so I am not able to see the 1'bz on the pin.

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bruce_karaffa
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Registered: ‎06-21-2017

An ILA is nothing more than some BRAM, address counters and trigger logic.  It sits inside the FPGA and only sees core logic levels.

View solution in original post

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dpaul24
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Registered: ‎08-07-2014

@sf ,

You can probe nothing more than 0s or 1s with ILAs. It is due to their placements. The tri-state buffers are sitting at the FPAG peripherals, whereas the ILA being  part of the logic elements sits inside.

------------FPGA enthusiast------------
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