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Explorer
Explorer
352 Views
Registered: ‎05-14-2017

synthesis critcal warning for ddr3

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I receievd this critcal warning during synthesis.should this be resolved within my design. I belived this paramter is gnerated with the ddr3  IP core and not from my design. what is this?

  • [Memdata 28-203] ADDRESS_SPACE or ADDRESS_MAP tag name inst_inst_u_ddr3_mem_intfc_u_ddr_cal_riu_mcs0_U0_microblaze_I was not found. Some data may have not been translated.
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Xilinx Employee
Xilinx Employee
288 Views
Registered: ‎08-21-2007

回复: synthesis critcal warning for ddr3

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You can ignore it and go ahead with your design.

View solution in original post

3 Replies
Xilinx Employee
Xilinx Employee
319 Views
Registered: ‎08-21-2007

回复: synthesis critcal warning for ddr3

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Did you make any modification within the MIG IP?

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Explorer
Explorer
306 Views
Registered: ‎05-14-2017

回复: synthesis critcal warning for ddr3

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The MIG IP  (DDR3) is a readonly module therefore I could't make any modification.

I only instantiated it into my design and build on top of it.

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Xilinx Employee
Xilinx Employee
289 Views
Registered: ‎08-21-2007

回复: synthesis critcal warning for ddr3

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You can ignore it and go ahead with your design.

View solution in original post