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Visitor
Visitor
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Registered: ‎07-08-2009

the simulation issue on HBM IP's example design (using Questasim)

Hi, I am trying to do simulation of HBM IP's example design with questasim 2019.4 and vivado 2020.1. I receive lots of error info during simulation. The error info is "# ** Error: $hold( posedge &&& :46100945 ps, negedge :46100945 ps, 500 ps ); # Time: 46100945 ps Iteration: 9 Protected: /sim_tb_top/u_example_top/u_hbm_0/inst/ONE_STACK/u_hbm_top/ONE_STACK_HBM/hbm_one_stack_intf/SIP_HBM_ONE_STACK_INTF_INST/HBM_DMAH_CORE/HBM_SC_LT/MC_CHa////#Setuphold# File: C:/Xilinx/Vivado/2020.1/data/secureip/hbm_one_stack_intf/hbm_one_stack_intf_002.svp Line: 40341". I set "+notimingcheck" on questa.compile.vlog.more_options and "-onfinish final +notimingcheck" on questa.simulate.vsim.more_options on Vivado Settings as the guide pdf said. What can I do? Thanks
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Visitor
Visitor
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Registered: ‎07-08-2009

 
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Moderator
Moderator
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Registered: ‎04-24-2013

Hi @tohust ,

There is a known issue with the HBM IP model where the +notimingcheck option is not suppressing the messages.

A Change Request has been filed to have this behaviour fixed. Currently it is targeted for the 2020.2 release although this may change.

Best Regards
Aidan

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