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Registered: ‎04-15-2014

where is the mmcm_locked of MIG?

I want to use the MIG of UltraKintex for DDR4, but can't find the output signal-mmcm_locked(Vivado 2018.3). How to connect the input signal - mmcm_locked of processor system reset module?

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Registered: ‎11-28-2016

Hello @wangxilinxnewer ,

The MMCM_LOCKED signal inside the MIG comes from the MMCM in the DDR4 Infrastructure block and is connected to the DDR4 mem_intfc module.  These are below the top level wrapper of the IP.  mmcm_locked_location.PNG

Now for your specific question the PS block resets come in from the external PS_SRST_B and PS_POR_B pins.  In your design you'll have to figure out a way that keeps the PS in reset while the bitstream is loaded on the FPGA and keeps it in reset until the MIG mmcm_locked asserts, and that would have to be routed out on a pin in the PL I/O banks, then routed on hardware to the PS reset input pins.  Overall I don't recommend this approach.

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