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Explorer
Explorer
779 Views
Registered: ‎04-28-2013

2X clock is needed !

MIG1.4 can only give 4X and 1X clock definetly . But 2X clock will be needed in some case and MIG 1.4 sometimes can output 2X, sometimes can not!

 

I suggest 2X clock should be an option on Advanced Clocks option on next MIG.

nonsense
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5 Replies
Scholar hbucher
Scholar
738 Views
Registered: ‎03-22-2016

Re: 2X clock is needed !

@liubo_fpga It is kind of trivial to generate a 2X clock from a 4X clock.

Not even sure about convenience in this case...

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Explorer
Explorer
717 Views
Registered: ‎04-28-2013

Re: 2X clock is needed !

@hbucher,

It is not easy to synchronous CLK4X of phy inside to CLK2X which is generated outside of Phy.

Sometimes , I need to convert 1:2 structure to 1 : 4 structure.

It will be very convenient if MIG can output synchronous clk2X and clk1x together.

nonsense
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Moderator
Moderator
712 Views
Registered: ‎06-30-2010

Re: 2X clock is needed !

@liubo_fpga I would like to confirm a couple of thing. Firstly what device are you using and what IP.

 

The fact that you mention MIG v1.4 I am assuming its UltraScale and DDR3 is that correct?

 

I am not really sure what the problem you are posting about it, I see you have another post on the advanced options tab, is this related to that Tab?

 

When you mention 2:1 / 4:1 though it sound like you are asking about the PHY to controller clock frequency ratio (see attached)

 

However if you need a 2X clock for the rest of your design you can get this from the advanced options tab.

 

If the question is different to above please give a screen shot of what parameter you are asking about

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mig1.png
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Moderator
Moderator
711 Views
Registered: ‎06-30-2010

Re: 2X clock is needed !

sorry just saw on your other post you have given the device details "I found this problem when I generated ddr3 phy only IP with vivado 2017.4 on part vu440." so the above still holds
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Explorer
Explorer
691 Views
Registered: ‎04-28-2013

Re: 2X clock is needed !

Hi jheslip,

my part is  xcvu440-flga2892-1-c and my project MC is 2:1 structure (Bus 64,  memory x16)

I set Memory Device Interface Speed  2500ps , 400M

PHY to controller clock 4:1 ( It can't be changed), It's mean (Bus128, memory x16)

first i set reference input 10000, 100M,

I get M = 11, D = 1, D0 =11 on Advanced Clocking tab.

But I can't get a CLK2X clock from Additional Clock Outputs.

 

So I set reference input 5000, 200M,

I get M = 11, D= 2, D0 = 11 on Advanced Clocking tab.

I also can't get a CLK2X clock from Additional Clock Outputs.

 

I specify M and D,  M= 6, D= 2, D0 =6 on Advanced Clocking tab.

I can get a CLK2x clock from Additional Clock Outputs.

 

 

 

nonsense
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