UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor holonium
Visitor
1,902 Views
Registered: ‎03-28-2018

Artix-7 35T DDR3 MIG Error

When trying to design a diagram for the Artix-7 35T, the DDR3 component throws the following error:

  • [IP_Flow 19-3475] Tcl error in ::ipgui_design_1_mig_7series_0_0::updateAllModelParams procedure for BD Cell '/mig_7series_0'. error renaming "c:/Users/*/Test/Test.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_0/_tmp/design_1_mig_7series_0_0" to "c:/Users/*/Test/Test.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_0/design_1_mig_7series_0_0": permission denied
  • [BD 41-245] set_property error - Customization errors found on '/mig_7series_0'. Restoring to previous valid configuration.

Does anyone have any ideas on how to fix this? I am using 2015.4, which is used in the tutorials.

Thanks for your help.

0 Kudos
26 Replies
Moderator
Moderator
1,890 Views
Registered: ‎11-28-2016

Re: Artix-7 35T DDR3 MIG Error

Hello @holonium,

 

The first thing I noticed was the 'tmp' directory in your path.

I would go to the Project Settings then IP and change your IP Cache settings to disabled and clear the cache.  After that try recustomizing the IP and generating the output products.

 

0 Kudos
Visitor holonium
Visitor
1,888 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

I am not seeing the 'tmp' directory in the path. I was just making it so that my name is not seen.

0 Kudos
Visitor holonium
Visitor
1,886 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

IP caching was not enabled in the first place on it. When I looked under cache scope, it said disabled.

0 Kudos
Moderator
Moderator
1,873 Views
Registered: ‎11-28-2016

Re: Artix-7 35T DDR3 MIG Error

Hello @holonium,

 

The tmp I was referring to was this one:

c:/Users/*/Test/Test.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_0/_tmp/design_1_mig_7series_0_0" to "c:/Users/*/Test/Test.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_0/design_1_mig_7series_0_0": permission denied

 

Have you tried resetting the output products and then regenerating them?

0 Kudos
Visitor holonium
Visitor
1,871 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

How do I do that?

0 Kudos
Visitor holonium
Visitor
1,851 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

I have not modified any settings in the program, and am just using all the default parts.

0 Kudos
Moderator
Moderator
1,849 Views
Registered: ‎11-28-2016

Re: Artix-7 35T DDR3 MIG Error

Hello @holonium,

 

Try this:

delete_ip_run [get_files -of_objects [get_fileset sources_1] /path/proj/proj.srcs/sources_1/bd/proj_design/proj_design.bd]

 

set_property synth_checkpoint_mode None [get_files  /path/proj/proj.srcs/sources_1/bd/proj_design/proj_design.bd]

 

generate_target all [get_files  /path/proj/proj.srcs/sources_1/bd/proj_design/proj_design.bd]

 

Update the paths and file names to match your design.

0 Kudos
Highlighted
Visitor holonium
Visitor
1,845 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

Same error as before. I entered the commands after deleting the MIG component from the diagram. When I tried to put it back in, the same error was given.

0 Kudos
Visitor holonium
Visitor
1,843 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

Could I do a pin by pin mapping to bypass the MIG component?

0 Kudos
Visitor holonium
Visitor
1,924 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

Here is the console log for when I try to place the MIG:

apply_board_connection -board_interface "ddr3_sdram" -ip_intf "mig_7series_0/mig_ddr_interface" -diagram "test2"
INFO: [board_interface:-100] set_property CONFIG.BOARD_MIG_PARAM ddr3_sdram [get_bd_cells -quiet /mig_7series_0]
WARNING: [Board 49-26] cannot add Board Part digilentinc.com:arty-s7-25:part0:1.0 available at C:/Xilinx/Vivado/2015.4/data/boards/board_files/arty-s7-25/E.0/board.xml as part xc7s25csga324-1 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part digilentinc.com:arty-s7-50:part0:1.0 available at C:/Xilinx/Vivado/2015.4/data/boards/board_files/arty-s7-50/B.0/board.xml as part xc7s50csga324-1 specified in board_part file is either invalid or not available
error renaming "c:/Users/*/Test2/Test2.srcs/sources_1/bd/test2/ip/test2_mig_7series_0_0/_tmp/test2_mig_7series_0_0" to "c:/Users/*/Test2/Test2.srcs/sources_1/bd/test2/ip/test2_mig_7series_0_0/test2_mig_7series_0_0": permission denied
ERROR: [IP_Flow 19-3475] Tcl error in ::ipgui_test2_mig_7series_0_0::updateAllModelParams procedure for BD Cell '/mig_7series_0'. error renaming "c:/Users/*/Test2/Test2.srcs/sources_1/bd/test2/ip/test2_mig_7series_0_0/_tmp/test2_mig_7series_0_0" to "c:/Users/*/Test2/Test2.srcs/sources_1/bd/test2/ip/test2_mig_7series_0_0/test2_mig_7series_0_0": permission denied
INFO: [IP_Flow 19-3438] Customization errors found on '/mig_7series_0'. Restoring to previous valid configuration.
ERROR: [BD 41-245] set_property error - Customization errors found on '/mig_7series_0'. Restoring to previous valid configuration.

ERROR: [Common 17-39] 'set_property' failed due to earlier errors.
apply_board_connection: Time (s): cpu = 00:00:00 ; elapsed = 00:00:12 . Memory (MB): peak = 1176.277 ; gain = 0.000
INFO: [Common 17-17] undo 'apply_board_connection -board_interface "ddr3_sdram" -ip_intf "mig_7series_0/mig_ddr_interface" -diagram "test2" '
1
endgroup

0 Kudos
Visitor holonium
Visitor
1,920 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

Same error also occured on Vivado 2017.4. Do you know if I could call customer support about this? It is becoming quite frustrating.

0 Kudos
Visitor holonium
Visitor
1,906 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

Here is the output of the 2017.4 edition when trying to fix it:

  • [IP_Flow 19-3475] Tcl error in ::ipgui_system_mig_7series_0_0::updateAllModelParams procedure for BD Cell 'mig_7series_0'. error renaming "c:/Users/*/Test3/Test3.srcs/sources_1/bd/system/ip/system_mig_7series_0_0/_tmp/system_mig_7series_0_0" to "c:/Users/*/Test3/Test3.srcs/sources_1/bd/system/ip/system_mig_7series_0_0/system_mig_7series_0_0": permission denied
  • [BD 41-245] set_property error - Customization errors found on 'mig_7series_0'. Restoring to previous valid configuration.
Vivado 2017.4.PNG
0 Kudos
Visitor holonium
Visitor
1,886 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

Does anyone have any ideas to try?

0 Kudos
Moderator
Moderator
1,873 Views
Registered: ‎11-28-2016

Re: Artix-7 35T DDR3 MIG Error

Hello @holonium,

 

I gave this a try on my PC but it has Windows 7 so I'm not sure if it will behave the same on your end.

 

First I downloaded the Digilent board files and added them to my Vivado directory.

Next I created a new Vivado project and targeted the Arty A7-35 board.

When the GUI loaded I selected the Create Block Design tab and then went to the Board tab

Then I double clicked to add the DDR3 controller to the block design, and I got the same error you did

Next I went to Project Manager -> Settings

Went to the IP option in the Settings window and pressed the Clear Cache button

After the cache was cleared I deleted the MIG from the BD and then added it again

When I added it the second time everything worked correctly!

 

Can you give this flow a try and let me know if it works?

0 Kudos
Visitor holonium
Visitor
1,860 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

I got the same error as before, but with no popup windows. The cache is apparently set to local. I will post the output of the console in a moment. Here is the link: https://pastebin.com/wr0V3RBk.

0 Kudos
Visitor holonium
Visitor
1,849 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

Is the link helpful for the troubleshooting process.

0 Kudos
Moderator
Moderator
1,841 Views
Registered: ‎11-28-2016

Re: Artix-7 35T DDR3 MIG Error

Hello @holonium,

 

Have you verified that the board files are installed in the proper location for Vivado 2017.4?

board_files.PNG

 

 

 

Can you also try this flow:

  • Have a clean BD that started with selecting the Arty A7-35
  • In the BD window click the add IP button
  • Select the MIG
  • When the MIG is placed run the Board Automation option that's available at the top of the work space

You'll see an error BD 41-1273 but you can ignore that.

0 Kudos
Moderator
Moderator
1,835 Views
Registered: ‎11-28-2016

Re: Artix-7 35T DDR3 MIG Error

Hello @holonium,

 

Do you have the WebPack version of Vivado installed?

Can you go to the Xilinx Add Design Tools or Devices 2017.4 app in your Windows start menu and make sure all the Artix-7 devices are added to your install?

0 Kudos
Visitor holonium
Visitor
1,824 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

I am using the design suite license that came with the evaluation kit.

0 Kudos
Moderator
Moderator
1,522 Views
Registered: ‎11-28-2016

Re: Artix-7 35T DDR3 MIG Error

Hello @holonium,

 

Any word about trying that other flow by adding the MIG IP and then running board automation?
What about dragging and dropping the MIG IP to the BD instead of double clicking on it?

Can you create a normal Project, go to the IP sources and search for the MIG IP, click through all the MIG IP GUI pages, and then generate output products at the end?

 

We did some more testing with Windows 10 and didn't reproduce the error with local or remote settings for the BD, using the webpack install of Vivado, and using a normal install but without any licenses.

 

 

0 Kudos
Visitor holonium
Visitor
1,466 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

I am using the Design Suite, I tried dragging and double clicking. Should I upgrade to the 2018.1 edition? The MIG is on the board, it just never has a DDR3 pin on it.

0 Kudos
Moderator
Moderator
1,439 Views
Registered: ‎11-28-2016

Re: Artix-7 35T DDR3 MIG Error

Hello @holonium,

 

Have you tried the suggestion of generating the MIG IP in a normal Project flow instead of IPI?

  • Can you create a normal Project, go to the IP sources and search for the MIG IP, click through all the MIG IP GUI pages, and then generate output products at the end?

Did you verify that the board files are present in your design?

 

I don't think upgrading would help but you can try if you want.

0 Kudos
Visitor holonium
Visitor
1,413 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

How do I do that exactly? I am not sure how to do that. Also, I will soon be moving to Linux for the software.

0 Kudos
Moderator
Moderator
1,371 Views
Registered: ‎11-28-2016

Re: Artix-7 35T DDR3 MIG Error

Hello @holonium,

 

I'm not sure which part you're unsure about but for checking the board files look at this post earlier in the thread:

https://forums.xilinx.com/t5/Memory-Interfaces/Artix-7-35T-DDR3-MIG-Error/m-p/843437#M11713

 

As for generating the MIG IP this is the flow.

  • Can you create a normal Project instead of a Block Design, go to the IP Catalog under the Project Manager heading, search for the MIG, double click to bring up the customization GUI, click through all the MIG IP GUI pages, and then generate output products at the end
0 Kudos
Visitor holonium
Visitor
1,306 Views
Registered: ‎03-28-2018

Re: Artix-7 35T DDR3 MIG Error

Sorry if it has been a while since I have last responded, but would you please walk me through the customization project? I am having trouble with the System Signals Selection step. It keeps asking me for clock pins, and I am not sure which one to pick.

0 Kudos
Moderator
Moderator
1,276 Views
Registered: ‎11-28-2016

Re: Artix-7 35T DDR3 MIG Error

Hello @holonium,

 

All you have to do here is select pins in banks or adjacent banks to the memory interface. For example if the memory interface is in banks 15-17 then simply select a bank (15, 16, or17), and then see which pins are available. If you select a bank and there aren't any available pins or it gives you an error if you select a pin, then select another bank.  This is just a quick test to see if you can get the MIG tools to generate output products on your computer so it doesn't have to be an exact configuration.