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Adventurer
Adventurer
147 Views
Registered: ‎04-06-2017

DDR3 MIG simulation failure

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I have tried to simulate the MIG for ddr3 in 7 series FPGA. The simulation diverse from automatic created example at around 87us. In my attached project, the app_rdy signal is low level except very few pulses. I compare the example with my project and find no difference at the input to MIG, but MIG app_rdy has different response. I hope you can help me find the reason. Thank you so much.

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Adventurer
Adventurer
110 Views
Registered: ‎04-06-2017

Re: DDR3 MIG simulation failure

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No app_cmd input to the MIG

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Adventurer
Adventurer
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Registered: ‎04-06-2017

Re: DDR3 MIG simulation failure

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No app_cmd input to the MIG

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