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MIG output clocks using for driving other logics

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Adventurer
Posts: 57
Registered: ‎04-19-2016
Accepted Solution

MIG output clocks using for driving other logics

Hello, 

 

 

Could I use MIG IP clock outputs ( ui_clk ) to drive the other logics ( as AXI-Stream and AXI-Lite clocks )  ?  Is MIG IP needed to be initialization in SW ? or directly begin to execution  ? 

 

Best Regards,

 


Accepted Solutions
Voyager
Posts: 326
Registered: ‎08-07-2014

Re: MIG output clocks using for driving other logics

[ Edited ]

Could I use MIG IP clock outputs ( ui_clk ) to drive the other logics ( as AXI-Stream and AXI-Lite clocks )  ?

If you look at the MIG example_design this ui_clk is used to drive the traffic_gen that R/W DDR via MIG core. So it should be possible to use in other parts of the logic that drives data/reads from the MIG core.

 

 Is MIG IP needed to be initialization in SW ? or directly begin to execution  ? 

You much check the init_calibration_complete status, out from the MIG core. If it is high then only begin operation with the MIG.

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All Replies
Voyager
Posts: 326
Registered: ‎08-07-2014

Re: MIG output clocks using for driving other logics

[ Edited ]

Could I use MIG IP clock outputs ( ui_clk ) to drive the other logics ( as AXI-Stream and AXI-Lite clocks )  ?

If you look at the MIG example_design this ui_clk is used to drive the traffic_gen that R/W DDR via MIG core. So it should be possible to use in other parts of the logic that drives data/reads from the MIG core.

 

 Is MIG IP needed to be initialization in SW ? or directly begin to execution  ? 

You much check the init_calibration_complete status, out from the MIG core. If it is high then only begin operation with the MIG.

--------------------------------------------------------------------------------------------------------
Being a non-Xilinx member, giving out "Kudos" or marking my posts as "Accept as solution" would trigger frequent and better future answers.
--------------------------------------------------------------------------------------------------------
Adventurer
Posts: 57
Registered: ‎04-19-2016

Re: MIG output clocks using for driving other logics

Thank you @dpaul24

 

I am using ui_clk '  output of MIG IP, to drive the other logics. Even I have used internal PLL of MIG IP to produce some other clocks. I have checked clocks are properly produced.