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Need help debugging AXI WREADY!

Visitor
Posts: 13
Registered: ‎07-01-2015

Need help debugging AXI WREADY!

Hello everyone, The picture shows the AXI signal between AXI Interconnect and MIG on KCU105. It is in AXI burst mode of 256 beats. The WREADY signal (from MIG) behaves correctly at the beginning, but goes low (and stay low) after a while. The signal never goes high after the bump. The AXI Interconnect is sending WVALID the whole time, waiting for MIG to take the data. Any idea why the MIG WREADY goes low (and stay low)? Thanks for the help!
FSM_Stuck_MIG_1.png
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Teacher
Posts: 5,122
Registered: ‎03-31-2012

Re: Need help debugging AXI WREADY!

@ballanche it seems like you are sending the next aw transaction while the current w channel is still busy. Maybe the MIG can't tolerate this? Space out our aw channel transaction after the w is finished and see if it helps.

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