UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
146 Views
Registered: ‎12-10-2018

PL DDR$ Memory

Dear Sir/Mam,

I am the user of Zynq ultrascale+102 evaluation board.

I want to read data from PLDDR4 memory and write datas to PLDDR4 memory with the help of Vivado software 2018.3.

I am not getting how we can perform such job.

 

how we can do this job??

Please provide me usefull link.

 

Thanks

 Brijendra Kumar Sharma

 

0 Kudos
2 Replies
Xilinx Employee
Xilinx Employee
117 Views
Registered: ‎03-04-2018

Re: PL DDR$ Memory

Hello brijendra@iitk.ac.in ,

There are example design and document in the ZCU102 homepage, could you please check it first? I hope it would be helpful for you.

 

Best regards,

kshimizu

 

Product Application Engineer Xilinx Technical Support

-------------------------------------------------------

Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.  Please Give Kudos.

-------------------------------------------------------

zcu102_01.png
zcu102_2.png
70 Views
Registered: ‎12-10-2018

Re: PL DDR$ Memory

Dear Sir/Mam,
This is just for MIG test.
but how to utilize MIG with zynq ultrascale+MPSOC 102 evaluation board.
Is there any doc, pdf. So that i get idea for read write PLDDR4.
Also in Above pdf all the steps are given for MIG test through LED...
But i do not know how many steps, we have needed for read write in PLDDR4 memory components.

I am focessing that .... how to make block diagram for MPSOC and MIG(PLDDR4) through vivado software.

and an example code in SDK to read write from PLDDR4.

So its gentle request to prvode me sufficient information.

 

Brijendra@IIT Kanpur

 

0 Kudos