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Trying to reproduce KCU105 DDR4 MIG settings in a custom design

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Explorer
Posts: 143
Registered: ‎02-17-2009
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Trying to reproduce KCU105 DDR4 MIG settings in a custom design

I've generated a test design with DDR4 for KCU105 and am now trying to reproduce the same MIG settings in a custom design. Even though I picked exactly the same device as on the reference board (xcku040-ffva1156-2-e), the same memories, and the same external reference clock frequency (300 MHz) I can't reproduce the same settings. For example, the minimum supported time period for DCI CASCADE is 833 ps in the reference design and 938 ps in a custom design. Also, I can't figure out where all the options for the Reference Input Clock Speed are coming from? The Cas Latency in the reference design is set to 17 but It is not an available choice in my custom design, etc...

 

Thanks,

/Mikhail


Accepted Solutions
Explorer
Posts: 143
Registered: ‎02-17-2009

Re: Trying to reproduce KCU105 DDR4 MIG settings in a custom design

Sorry, I've just edited my reply. I was looking at the wrong design when I said re-loading has fixed the problem. I think what actually happened was that the design was originally targeting a different part and simply changing the part and updating the cores was not enough. Something in the project was not getting updated with the new part information. If I haven't seen better numbers in the reference design I would probably never know something was missing here...

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Moderator
Posts: 7,728
Registered: ‎02-27-2008

Re: Trying to reproduce KCU105 DDR4 MIG settings in a custom design

mm,

 

Check the version.  Earlier versions may not be compatible from later versions.  I always caution people to FREEZE their IP revisions.  Once it works, stick with it (DO NOT UPGRADE TO A NEWER VERSION).

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
Explorer
Posts: 143
Registered: ‎02-17-2009

Re: Trying to reproduce KCU105 DDR4 MIG settings in a custom design

Austin,

 

The version of the tools and of the core are the same for both designs.

 

With regards to your advice, not upgrading the IPs is frequently impossible in the lifetime of a project as Xilinx obsoletes them in newer versions of tools. So, I was forced to upgrade many times against my will.

 

Thanks,

/Mikhail

Explorer
Posts: 143
Registered: ‎02-17-2009

Re: Trying to reproduce KCU105 DDR4 MIG settings in a custom design

[ Edited ]

The problem seems to have fixed itself after I removed the core and the associated rst_ddr4 block, which was automatically inserted by Run Connection Automation and then re-inserting the IP and re-running the Automation.

Moderator
Posts: 7,728
Registered: ‎02-27-2008

Re: Trying to reproduce KCU105 DDR4 MIG settings in a custom design

mm,

 

I hate it when that happens.  That tells me there is something unconstrained/wrong somewhere.  It is called an unstable design (subsequent runs with minor changes cause some to fail, others to work).  Stop.  Find out why.  Do not move forward.

 

Whenever I have not found out the root cause, it has come back to haunt me.

 

A different board, a different part, may reveal the problem again.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
Explorer
Posts: 143
Registered: ‎02-17-2009

Re: Trying to reproduce KCU105 DDR4 MIG settings in a custom design

Sorry, I've just edited my reply. I was looking at the wrong design when I said re-loading has fixed the problem. I think what actually happened was that the design was originally targeting a different part and simply changing the part and updating the cores was not enough. Something in the project was not getting updated with the new part information. If I haven't seen better numbers in the reference design I would probably never know something was missing here...