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Visitor chy520cvv
Visitor
9,433 Views
Registered: ‎07-03-2014

problems about MIG

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I am using Nexys4. PCM(mt45w8mw16bgx) in the board is not supported by vivado2014.2. And I cannot find the timing parameters of MIG setting in mt45w8mw16bgx's datasheet. How should I deal with it?

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Xilinx Employee
Xilinx Employee
16,086 Views
Registered: ‎07-11-2011

Re: problems about MIG

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Hi,

 

MT45W8MW16BGX is not a DDR2/3, it is SRAM based architecture, MIG currently do not support this specific memory.

Please check if you can use QDRII+ SRAM or any supported device given in AR-54025

 

If MT45W8MW16BGX is mandatory for your project contact your FAE with project details, he might do the nedeful

 

MIG GUI will display pin compatible FPGAs for your current project FPA, if you do not find the specfic part over there you need to create the core separately tagetting xc7a100tcsg324

 

Regards,

Vanitha

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Visitor chy520cvv
Visitor
9,423 Views
Registered: ‎07-03-2014

Re: problems about MIG

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there is another problem. In pin compatible FPGA, my target fpga is xc7a100tcsg324,but there is no the same type in pin compatible fpgas. How should I choose for this target?

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Visitor chy520cvv
Visitor
9,422 Views
Registered: ‎07-03-2014

Re: problems about MIG

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the timing parameters in the "Create Custom Part" is not found in MT45W8MW16BGX datasheet,such as 'tcke,trcd....'

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Xilinx Employee
Xilinx Employee
16,087 Views
Registered: ‎07-11-2011

Re: problems about MIG

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Hi,

 

MT45W8MW16BGX is not a DDR2/3, it is SRAM based architecture, MIG currently do not support this specific memory.

Please check if you can use QDRII+ SRAM or any supported device given in AR-54025

 

If MT45W8MW16BGX is mandatory for your project contact your FAE with project details, he might do the nedeful

 

MIG GUI will display pin compatible FPGAs for your current project FPA, if you do not find the specfic part over there you need to create the core separately tagetting xc7a100tcsg324

 

Regards,

Vanitha

---------------------------------------------------------------------------------------------
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Mark the post - "Accept as solution" and give kudos if information provided is helpful and reply oriented
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Observer andrewsi
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9,329 Views
Registered: ‎02-05-2012

Re: problems about MIG

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This part works fine with the AXI EMC memory controller, by the way, which knows how to use Async PSRAM like this part.  I have it up and running just fine on the Nexys 4 right now.

 

For my next trick, incidentally, I'm trying to figure out how to enable both the EMC IP and the physical part to switch over to page read mode for better performance, but I haven't been successful yet. I think my problem has to do with getting access to the PSRAM's configuration registers so I can flip the bit.  I've tried both Micron's documented "software" method by accessing the top word of memory with 2 consecutive reads followed by 2 writes using Xil_In16/Xil_Out16 macros, but that didn't seem to work, nor did trying to enable the CRE line manually using the EMC's PSRAM control register.  Maybe I'll get it figured out at some point.

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Xilinx Employee
Xilinx Employee
9,318 Views
Registered: ‎07-11-2011

Re: problems about MIG

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Hi,

 

AXI EMC memory controller is entirely different to MIG, please visit below links for MIG supported memory devices and its operation in detail

 

http://www.xilinx.com/support/answers/54025.htm

http://www.xilinx.com/support/documentation/ip_documentation/mig_7series/v2_1/ug586_7Series_MIS.pdf

 

 

For your EMC page switchover issue discussion i would suggest you to start a new thread in one of Embedded Solutions boards so that you will get better help

http://forums.xilinx.com/t5/Embedded-Solutions/ct-p/EMBED

 

Thanks,

Vanitha

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