12-26-2018 01:27 AM
I used the 10G/25G Ethernet Subsystem to implement my design. The IP configuration is present in this picture.
When i test this design, the ILA shown the rx_block_lock didn't assert and the rx_gt_lock was high , the other hand switch seem didn't link up .
How can i fix this issue?
01-02-2019 02:18 AM
If the positive and negative signals of a differential pair are swapped, then data cannot be correctly received on that lane.
Verify that the link has the correct polarity of each differential pair.
Did you check with loopback test before connecting to link partner?