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Observer jamesba-bbc
Observer
7,313 Views
Registered: ‎07-27-2011

10G Ethernet Subsystem in 64-bit mode with 312.5MHz reference clock

Hello, I have a design with a 312.5MHz reference clock for my 10G ethernet transceiver, which works well with the 10G Ethernet subsystem core configured in 32-bit mode. I would like to use the 1588 subsystem, which is only available when the core is configured in 64-bit mode.

 

Would it be possible to configure the core to run in 64-bit mode, but still use a 312.5MHz reference clock for the transceiver? Would this be as simple as configuring the core with the common transceiver logic in the example design, and then modifying the settings in the gt_common_block ?

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Observer jamesba-bbc
Observer
7,306 Views
Registered: ‎07-27-2011

Re: 10G Ethernet Subsystem in 64-bit mode with 312.5MHz reference clock

In fact is this as simple as setting QPLL_REFCLK_DIV to 2 instead of 1? It looks to me like that should work.

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Moderator
Moderator
7,289 Views
Registered: ‎02-16-2010

Re: 10G Ethernet Subsystem in 64-bit mode with 312.5MHz reference clock

It may not be as simple as you might expect. The data path could be changing between 32-bit and 64-bit.

It is good to generate a fresh core for enabling 1588 subsystem.
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Xilinx Employee
Xilinx Employee
7,278 Views
Registered: ‎02-06-2013

Re: 10G Ethernet Subsystem in 64-bit mode with 312.5MHz reference clock

Hi 

 

Which device are you targetting this core?

 

If ultrascale devices then you have a GUI option to select 312.5Mhz as reference clocks and if 7 series then you need to generated the gtwizard for 10GBASE_R protocol for 312.5Mhz as reference clocks and compare with the standard core(Which will be always generated for 156.25Mhz reference clocks) generated wizard files for the modifications need to be done.

Regards,

Satish

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Observer jamesba-bbc
Observer
7,273 Views
Registered: ‎07-27-2011

Re: 10G Ethernet Subsystem in 64-bit mode with 312.5MHz reference clock

It's for a Zynq 7045. I will generate the gtwizard files and compare them.

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