01-27-2019 08:28 PM
We have developed kintex 7 FPGA based custom board .we want to implement ethernet interface (RGMII) in our custom board.so we used same logic as development board.Here i am sharing that interface part.we are down loading ehernet lite project,then the phy is not configuring.Same project is working on kc705 development board.So please suggest what steps have to fallow to configure phy chip.
01-29-2019 03:25 PM - edited 01-29-2019 03:26 PM
Wait... Ethernet Lite?
Ethernet Lite is only 10/100 Ethernet. It doesn't do 1000 Ethernet, so it doesn't have an RGMII port--it only has an MII port.
You need to implement a Tri-Mode Ethernet MAC if you want to talk to the PHY. You can't use MII to talk to it.
01-29-2019 08:58 PM
Hi Joe G,
Development board ehternet interface can support MI/GMII/RGMII and SGMII .
According to development board we have taken interface upto RGMII.
Ethernet Lite is only 10/100 Ethernet. Same program tested in our custom board for upto 10/100.
Initially we want to verify hardware is ok or not thatsway we taken Ethernet Lite Project.
When configured our custom board with this project we are unable to see link LED's and tx/rx LED's also.
please send your valuable suggestions .
01-30-2019 04:46 AM
This is from the Marvel PHY datasheet:
I don't see MII as a supported interface.
Are you able to get Ethernet Lite working on the KC705?
I'm not sure the Ethernet Lite MAC can even access the clause 45 registers inside the PHY, to set it up properly.
Did you fix the resistor?
01-30-2019 05:47 AM
Yes we have ethernetlite working on KC705 which has marvel PHY on it.
If required, I could share the HDF with you
01-30-2019 09:17 AM
Sorry; your "RGMII" reference sent me off into the weeds. You're running in plain-ol' MII mode.
Where did you put the MDI termination resistors? I don't think that particular Marvell PHY has integrated terminations. That's why they included them on the KC705:
Also, you don't show the RJ connector. It's possible there was a mix-up there, too.
01-30-2019 09:35 AM
Yes the design is based out of MII. Ethernetlite core doesnt supports RGMII.
Is it possible to have AXI ethernet core in your design where this core supports to use RGMII?
02-05-2019 02:09 AM
02-05-2019 02:10 AM
Hi Joe G,
R126 needs to be 5k (or 4.99k), not 4.7k.
we replaced 4.7k to 5.1k resistor.But no improvement .
we have verified regarding termination resistors.this IC does not have the internal impedance so we have removed T5 part number from our board and replaced with termination resistorrs with ( HFJ11-2450E-L12RL) RJ45 connector.this connector support MII interface means 10/100 Mbps data link.The detailed diagram attached.we configured ethernet lite program but no improvement in performance and LED's also.we are unable to see single LED status also.Actually from chip active low should drive to LED's but that pins are always active high status.
02-10-2019 09:55 PM
we observed one small setting in our custom board compare to kintex 7 development board.please see the attachments.
Auto negotiated link speed 1000 ----------------- custom board.
Auto negotiated link speed 100 ------------------- Development board.
Please suggest how this is happening.we are fallowing same setting of development board.
Coming to tx and rs clk from phy is
tx_clk --125 mHz and Rx_clk -- 2.5Mhz in our custom board
tx_clk --25 mHz and Rx_clk -- 25Mhz in development board for same project of ethernet lite from sdk.
02-11-2019 03:02 AM
02-11-2019 08:32 PM
we changed phy_link_speed parameter in BSP settings from CONFIG_LINKSPEED_AUTODETECT value to CONFIG_LINKSPEED100.
But no improvement in generation in tx_clock and rx_clock speed.
we are unble to see LED's status.These LED's are always stuck up to active HIGH.
Please see the screen images and suggest the modifications.