07-06-2014 03:47 PM
I'm facing a problem when using IBERT on XC5VFX70T-2-FF665.
The line rate, after programming the FPGA, doesn't match the selected one using the wizard in Core Generator.
Furthermore, the *.xco file includes the following statements that don't match as well:
In what follows, snapshots are given that illustrates the IBERT settings:
Moreover, when selecting Near-End PCS the line rate reaches 7.812 Gbps which exceeds the limit of 6.5.
Thanks in advance for any feedback.
07-07-2014 01:56 AM
07-07-2014 02:21 AM
Thanks very much for your reply.
Which version of ISE tool you are using?
can you check the following attributes in IBERT GUI?
According to equation 5-1, f(PLL Clock) = 2.5 Ghz => Line rate should be 5 Gbps.
07-07-2014 02:28 AM