UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Visitor tushar
Visitor
7,420 Views
Registered: ‎08-27-2015

MDIO Interfacing between TEN GIG ETH MAC and TEN GIG ETH PCS core IP

Hi

I am trying to read the PHY registers in Ten gig PCS, using MDIO transactions from Ten gig eth MAC. But the value I am reading is not right and also I am not getting the MDIO ready bit as HIGH ( reading MAC register 0x050C, the 16th bit is not getting HIGH which shows that MDIO is ready).

 

What should I do. Do I need to follow some specific steps for this. Please help

Tags (2)
0 Kudos
2 Replies
Xilinx Employee
Xilinx Employee
7,404 Views
Registered: ‎08-01-2008

Re: MDIO Interfacing between TEN GIG ETH MAC and TEN GIG ETH PCS core IP

PG051 Table 2-35 describes about MDIO Ready which indicate the MDIO is enable and ready for a new transfer and the default value is 0x0.

To know if the bit is set, the user logic should do polling to the register.
Thanks and Regards
Balkrishan
--------------------------------------------------------------------------------------------
Please mark the post as an answer "Accept as solution" in case it helped resolve your query.
Give kudos in case a post in case it guided to the solution.
0 Kudos
Visitor tushar
Visitor
7,397 Views
Registered: ‎08-27-2015

Re: MDIO Interfacing between TEN GIG ETH MAC and TEN GIG ETH PCS core IP

I have already tried polling to the Register 0x050c bit 16th (i.e. MDIO ready) but that bit is not getting HIGH after my MDIO transaction completes.

 

I have written a procedure that will read the status register 0x01 of PHY, and to read this register I am polling MAC register 0x050C but since the READY bit (16th) is not getting asserted I am not able to move forward.

 

Can anyone please tell me on what conditions READY bit gets HIGH ?

0 Kudos