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Newbie nkatz565
Newbie
678 Views
Registered: ‎03-13-2018

Problem with simulating Aurora Core, non used signals throwing errors

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I was handed a project in which a functional set of Aurora cores (2 on a single board) were correctly working and communicating with other boards. For some reason, this project had no testbench or any other form of simulation, so I am trying to create a simulation where the two Aurora cores communicate with each other on a single board. I created a test bench of the top level wrapper which contains both cores, and some other logic for driving them. Right now the only thing in that test bench is the top level wrapper instantialized as a component, and a port map connecting the inputs to some signals.

 

When I try to run this simulation, it gives me an error telling me "formal drpaddr_in has no actual or default value [C:/..../duplex_channel_aurora_8b10b_0_1.vhd:130]", and a few other drp signals. 

 

These signals aren't even in my project. As I understand it, they're normally only made available when the GT DRP Interface option is enabled, but it is not enabled for this project, and these signals do not appear in my block diagram. Why is Vivado telling me to drive these signals if they aren't even part of the wrapper, let alone part of the project?

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Moderator
Moderator
1,075 Views
Registered: ‎02-16-2010

Re: Problem with simulating Aurora Core, non used signals throwing errors

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There was a known issue with Aurora 8B10B v10.3/Aurora 64B66B v9.3

Check this AR.
https://www.xilinx.com/support/answers/63338.html
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4 Replies
Scholar jmcclusk
Scholar
662 Views
Registered: ‎02-24-2014

Re: Problem with simulating Aurora Core, non used signals throwing errors

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you'll have to dig down into the wrapper around the GT core, and place zeros on the DRP interface, even if it's not used.  Simulation (and synthesis) really doesn't like it when inputs to a block are dangling, and have no default values defined.

Don't forget to close a thread when possible by accepting a post as a solution.
Moderator
Moderator
1,076 Views
Registered: ‎02-16-2010

Re: Problem with simulating Aurora Core, non used signals throwing errors

Jump to solution
There was a known issue with Aurora 8B10B v10.3/Aurora 64B66B v9.3

Check this AR.
https://www.xilinx.com/support/answers/63338.html
------------------------------------------------------------------------------
Don't forget to reply, give kudo and accept as solution
------------------------------------------------------------------------------
Newbie nkatz565
Newbie
655 Views
Registered: ‎03-13-2018

Re: Problem with simulating Aurora Core, non used signals throwing errors

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So I should edit the IP's source code? I had considered this, but it felt like a poor solution. Maybe I'll just enable the ports and tie them to a constant block so that it's still contained in my design.
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Newbie nkatz565
Newbie
652 Views
Registered: ‎03-13-2018

Re: Problem with simulating Aurora Core, non used signals throwing errors

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Thanks venkata. That looks exactly like my problem. I'll try this solution in a bit and report back if it works.
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