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Visitor siebren
Visitor
10,109 Views
Registered: ‎06-23-2009

SGMII on ML510 ( Emb Tri-mode Eth MAC Wrapper 1.6)

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Hi,

So far I got all the components I need for my design to work on the ML510 except Ethernet. All help to get it to work is appreciated.

I stayed as close as I could to the original design of the Emb Tri-mode Eth MAC Wrapper 1.6. See below for all the settings.
After pressing reset (PHY1_RESET_SGMII) link comes up at duplex LK/1000.
I do see Rx led on Phy1 when receiving a ping.  (Phy0 had same result earlier).
Via the led's I see    EMAC1CLIENTRXFRAMEDROP='1'  I guess this is an indicating for my problem.

Using:
ML510 Rev. C
Latest ISE 11.2
Platform Cable USB II
Windows XP SP 3
Network card PC: Realtek RTL8168/8111 PCI-E Gigabit Ethernet NIC at 10.0.0.1
- Jumbo frame: Disable
- Flow control: Disable
- VLAN Tagging: Disable
- Links speed/Duplex mode: Auto negotiation
- Offload Checksum: Tx/Rx Checksum
- Offload TCP_Largesend: Enable
- WOL & Shutdown Link SPeed: 100 Mbps first

Virtex5 Embedded Tri-mode Ethernet MAC Wrapper 1.6   
Host Type:    None
Enable EMAC 1:    Yes
Phy Interface:    SGMII
Speed:    Tri-Speed
SGMII Capabilities:    10/100/1000 Mb/s (No clock constraint required)
Flow Control Configuration:    All off
Transmitter Configuration:    All off
Receiver Configuration:        All off
Address Filter Configuration:    All off
   
main.ucf:   
NET "SGMIICLK_QO_P" LOC ="C4";   
NET "SGMIICLK_QO_N" LOC ="C3";   
NET "GTP_124_TX1_P" LOC ="B1";   
NET "GTP_124_TX1_N" LOC ="B2";   
NET "GTP_124_RX1_P" LOC ="A2";   
NET "GTP_124_RX1_N" LOC ="A3";   
NET "PHY1_RESET_SGMII" LOC ="AL25";   

and led's....

  
Ethernet_example_design.ucf   
CONFIG PART = 5vfx130tff1738-2;
INST "*GTX_DUAL_1000X_inst?GTX_1000X?tile0_rocketio_wrapper_gtx_i?gtx_dual_i" LOC = "GTX_DUAL_X0Y8";
Kept the rest the same except adding an occasional "eth0?" ("ETH0?CLK125" and "ETH0?CLIENT_CLK_1")
Commented out:
#ssch INST v5_emac_ll/* AREA_GROUP = AG_v5_emac ;
#ssch AREA_GROUP "AG_v5_emac" RANGE = CLOCKREGION_X1Y3,CLOCKREGION_X1Y4 ;

What would be the correct region ? Does it make a difference ?

 

Main:
ETH0: entity work.Ethernet_example_design(TOP_LEVEL)
  port map(
      -- Client Receiver Interface - EMAC1
      EMAC1CLIENTRXDVLD               => DBG_LED_0,
      EMAC1CLIENTRXFRAMEDROP          => DBG_LED_1,
      EMAC1CLIENTRXSTATS              => open,
      EMAC1CLIENTRXSTATSVLD           => DBG_LED_2,
      EMAC1CLIENTRXSTATSBYTEVLD       => DBG_LED_3,
      -- Client Transmitter Interface - EMAC1
      CLIENTEMAC1TXIFGDELAY           => (others =>'1'),
      EMAC1CLIENTTXSTATS              => FPGA_LED_USER1,
      EMAC1CLIENTTXSTATSVLD           => FPGA_LED_USER2,
      EMAC1CLIENTTXSTATSBYTEVLD       => open,
      -- MAC Control Interface - EMAC1
      CLIENTEMAC1PAUSEREQ             => '0',
      CLIENTEMAC1PAUSEVAL             => (others =>'1'),
      --EMAC-MGT link status
      EMAC1CLIENTSYNCACQSTATUS        => open,
      -- EMAC1 Interrupt
      EMAC1ANINTERRUPT                => open,
      -- Clock Signals - EMAC1
      -- SGMII Interface - EMAC1
      TXP_1                           => GTP_124_TX1_P,
      TXN_1                           => GTP_124_TX1_N,
      RXP_1                           => GTP_124_RX1_P,
      RXN_1                           => GTP_124_RX1_N,
      PHYAD_1                         => "00001",
      -- unused transceiver
      TXN_0_UNUSED                    => open,
      TXP_0_UNUSED                    => open,
      RXN_0_UNUSED                    => '0',
      RXP_0_UNUSED                    => '0',
      MGTCLK_P                        => SGMIICLK_QO_P,
      MGTCLK_N                        => SGMIICLK_QO_N,
      -- Asynchronous Reset
      RESET                           => PHY1_RESET_SGMII
  );
   
Code changes:   
Invert the Reset signal:    After "Reset Input Buffer"  in  Ethernet_example_design.vhd since PHY1_RESET_SGMII is active low on ML510.
   
Tools:   
Wireshark on Windows XP: does not see any response on ping. No Tx on ML510 to indicate a send.
I guess I am missing something, but what ?

 

Thanks,
      Siebren

ps: I tried "Ethernet 1000BASE-X PCS/PMA or SGMII" as well for SGMII, but basically to the same result: no input gets through.... 

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Xilinx Employee
Xilinx Employee
11,016 Views
Registered: ‎08-06-2008

Re: SGMII on ML510 ( Emb Tri-mode Eth MAC Wrapper 1.6)

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Hi Siebren,

 

Have you made sure that in inn v5_emac_v1_5.vhd,

following modification has been done or not:

 


constant EMAC0_PHYINITAUTONEG_ENABLE : boolean :=  TRUE;  -- FALSE by default

3 Replies
Xilinx Employee
Xilinx Employee
11,017 Views
Registered: ‎08-06-2008

Re: SGMII on ML510 ( Emb Tri-mode Eth MAC Wrapper 1.6)

Jump to solution

Hi Siebren,

 

Have you made sure that in inn v5_emac_v1_5.vhd,

following modification has been done or not:

 


constant EMAC0_PHYINITAUTONEG_ENABLE : boolean :=  TRUE;  -- FALSE by default

Visitor siebren
Visitor
10,078 Views
Registered: ‎06-23-2009

Re: SGMII on ML510 ( Emb Tri-mode Eth MAC Wrapper 1.6)

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Thanks !

 

This solved the problem. Ping's are getting echo-ed now.

 

Siebren

 

ps: Put  PHYAD_1   => "00111", as well, but don't think it makes a difference since MDIO to PHY is not connected.

ps2: Put CLOCKREGION_X1Y7,CLOCKREGION_X1Y8 in .cfg as well, but don't think it makes a difference

Visitor ingempo
Visitor
6,491 Views
Registered: ‎11-10-2011

Re: SGMII on ML510 ( Emb Tri-mode Eth MAC Wrapper 1.6)

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Hi Siebren ! 

 

Finally you could have implemented the TEMAC on the FPGA. Congratulations ! 

 

I am working on the card XUPV-LX110T and I have followed your recommendations.

 

I have created a project in ISE 10.1 and have generated the IPCore from ISE. The IPCore is the same that yours. I have created also an entity MAIN for to do the port map of the I/O ports of the TEMAC-WRAPPER as yours.

 

I have modified the constant EMAC0_PHYINITAUTONEG_ENABLE : boolean :=  TRUE;

 

I have modified the file V5_TEMAC_example_design.ucf  with the necessary recommendations.

 

I have followe the tutorial http://www.fpgadeveloper.com/2008/10/tri-mode-ethernet-mac.html Only to know the nets and his locations (LOC's) of the previous file.

 

I be be very grateful, if you could help me to achieve the communication, since up to the moment I have not achieved it.

 

Best Regards !

 

PS: I attach files of ISE's project 10.1

PS2: My email is ingempo (at sign) gmail (point) com 

ingempo@gmail.com

 

 

 

 

 

 

--
Esteban
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