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Contributor
Contributor
3,323 Views
Registered: ‎12-08-2010

The question about the Aurora IP core for XC6VLX130T-1156 FPGA

The XC6VLX130T-1156 FPGA owns five GTX quads, but when use aurora_8b10b_v6_2, the lane assignment just have four quads, why?

1.JPG

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2 Replies
Contributor
Contributor
3,322 Views
Registered: ‎12-08-2010

Re: The question about the Aurora IP core for XC6VLX130T-1156 FPGA

And I find that: GTXQ0---> QUAD_112; GTXQ1---> QUAD_113; GTXQ2---> QUAD_114; GTXQ3---> QUAD_115;

The QUAD_116 can not use for Aurora ?
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Xilinx Employee
Xilinx Employee
3,316 Views
Registered: ‎08-10-2007

Re: The question about the Aurora IP core for XC6VLX130T-1156 FPGA

I just checked in Coregen and was able to select from 5 quads.

My assumption is that you have selected the wrong part in CoreGen.

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