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Registered: ‎06-16-2014

VCU118 - 40G QSFP

Hi,

I have generated example design for 40G from Vivado 2018.2 and did the pin assignments as per the master constraints specified in the UG1224 document. I am using 125MHZ on board clock to generate the sable reference 100MHz clock. QSFP1 port on the VCU118 is selected.

I have connected the 40G optical cable from board to PC. with that rx_aligned signal is not going high. if I use the QSFP loopback module then the example design is working fine.

I have checked on the gt_loopback value which is 000.

I am not driving any values on the below signals from FPGA.
QSFP1_LPMODE_LS
QSFP1_MODPRSL_LS
QSFP1_MODSELL_LS
QSFP1_RESETL_LS

Kindly suggest.

Regards,

Shubha

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