11-29-2018 08:27 AM
Good evening to everyone... Could i have some help to build an equalizer based on 12 different filters (4 for the low frequencies, 4 for the medium frequencies and 4 for the high frequencies) ?
11-29-2018 06:07 PM
Have you tried extracting your frequencies using FPGA and then scaling various frequency bands before "reconstructing" the modified signal?
11-29-2018 06:09 PM
Sorry bout that, meant to write FFT, not FPGA.
12-05-2018 08:51 AM
I think you are looking for help on a Zedboard, correct? This forum might not be a good place to ask about this since it deals mostly with the new Community Portal from Xilinx.
I will suggest that going to the following pages with a lot more information about Zedboards.
http://zedboard.org/ - main Zedboard page
http://zedboard.org/projects - projects on Zedboards.
http://zedboard.org/forums/zed-english-forum - and specific forum for the Zedboard
Please let me know if this helps.
12-16-2018 06:39 AM
Hi, if you have a SoC system and you are interested in build a LTV bank filter you can use a IIR type filters . Those filters have a low computational cost and can be easily implemented in C++. One of the main problems is the processing delay between the filters, this delay can affect the filtered signal, to solve this issue you must design your filters with a similar length