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abhilashvr
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Registered: ‎02-19-2016

Bare Metal - Bare Metal Communication Method Zynq 7000

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Hi All,

We are using Zynq 7000 Series SoC for one of our project with Baremetal application in CPU0 and CPU1.

 

Could some one please suggest what is best communication method between this two Baremetal CPUs,for a scenario the data transfer size is less than 1KB?

 

I read about OpenAmp and RPMsg Lite,But i am not able to find the RPMsg Lite is ported to Zynq? So could some one please advise me on the best communication method suits for my case?

 

Thanks 

Abhilash

 

 

 

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shabbirk
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8,178 Views
Registered: ‎12-04-2016

Hi Abhilash

 

May be the Below Information would answer your Requirement:

 

If you want simple yet best communication between CPU0 and 1, you can refer to the below openAMP link:

https://www.xilinx.com/support/documentation/application_notes/xapp1079-amp-bare-metal-cortex-a9.pdf

 

The above link explains communication between zynq 7000 Cortex-A9 cores. 

The inter-processor communication in the example design is a semaphore flag. When the semaphore is set, CPU1 owns the UART and when it is cleared by CPU1, CPU0 is free to use the UART. This is a simple mechanism to share resources. The OCM memory is chosen because it is a low latency, shared resource. Also, this area of OCM is not cached so the memory accesses are deterministic.

 

 

Best Regards

Shabbir

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shabbirk
Moderator
Moderator
8,179 Views
Registered: ‎12-04-2016

Hi Abhilash

 

May be the Below Information would answer your Requirement:

 

If you want simple yet best communication between CPU0 and 1, you can refer to the below openAMP link:

https://www.xilinx.com/support/documentation/application_notes/xapp1079-amp-bare-metal-cortex-a9.pdf

 

The above link explains communication between zynq 7000 Cortex-A9 cores. 

The inter-processor communication in the example design is a semaphore flag. When the semaphore is set, CPU1 owns the UART and when it is cleared by CPU1, CPU0 is free to use the UART. This is a simple mechanism to share resources. The OCM memory is chosen because it is a low latency, shared resource. Also, this area of OCM is not cached so the memory accesses are deterministic.

 

 

Best Regards

Shabbir

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