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amsanchez
Contributor
Contributor
989 Views
Registered: ‎03-03-2017

Getting "Segmentation fault" when stopping remote processor in zynq ultrascale

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Hello, I'm using Zynq UltraScale+ XCZU4CG (TE08720) and I'm having a very strange behavior of openamp. I'm running Linux in APU and baremetal in RPU. I'm able to run my program in the RPU (a custom one, but the same happens if I try with echo_test). However, when I stop the Linux program and then try to stop the remote processor, I get: 

echo stop > /sys/class/remoteproc/remoteproc0/state
Segmentation fault

The remote program runs without any problem when debugged in APU or RPU via SDK. I'm using gdb with the Linux application to find if there is any segfault, but apparently, there isn't. So I'm not able to find when this is produced (except knowing that I get it when trying to stop remote processor).

I think I might be doing something wrong with the addresses in the device tree, but I haven't been able to find where. This is my dts, which works (at least, sometimes):

/include/ "system-conf.dtsi"
/ {
    reserved-memory {
        #address-cells = <2>;
        #size-cells = <2>;
        ranges;
        /* Reserved DDR memory for RPU firmware and shared memory between APU and RPU */
        rproc_0_reserved: rproc@3e000000 {
            no-map;
            reg = <0x0 0x3e000000 0x0 0x02000000>;
        };  
    };  

    power-domains {
        pd_r5_0: pd_r5_0 {
            #power-domain-cells = <0x0>;
            pd-id = <0x7>;
        };  
        pd_tcm_0_a: pd_tcm_0_a {
            #power-domain-cells = <0x0>;
            pd-id = <0xf>;
        };  
        pd_tcm_0_b: pd_tcm_0_b {
            #power-domain-cells = <0x0>;
            pd-id = <0x10>;
        };  
    }; 
 
    amba {
        r5_0_tcm_a: tcm@ffe00000 {
            compatible = "mmio-sram";
            reg = <0x0 0xFFE00000 0x0 0x100000>;
            pd-handle = <&pd_tcm_0_a>;
        }; 
        r5_0_tcm_b: tcm@fff00000 {
            compatible = "mmio-sram";
            reg = <0x0 0xFFF00000 0x0 0x100000>;
            pd-handle = <&pd_tcm_0_b>;
        };  
        elf_ddr_0: ddr@3e000000 {
            compatible = "mmio-sram";
            reg = <0x0 0x3e000000 0x0 0x01000000>;
        }; 

        test_r5_0: zynqmp_r5_rproc@0 {
            compatible = "xlnx,zynqmp-r5-remoteproc-1.0";
            reg = <0x0 0xff9a0100 0x0 0x100>,
                  <0x0 0xff340000 0x0 0x100>,
                  <0x0 0xff9a0000 0x0 0x100>;
            reg-names = "rpu_base", "ipi", "rpu_glbl_base";
            dma-ranges;
            core_conf = "split0";
            srams = <&r5_0_tcm_a &r5_0_tcm_b &elf_ddr_0>;
            pd-handle = <&pd_r5_0>;
            interrupt-parent = <&gic>;
            interrupts = <0 29 4>;
        };                
    };

    dmabuf1@3f000000 {
        compatible = "dmem-uio";
        reg = < 0x0 0x3f000000 0x0 0x200000>;
    };

    dmabuf2@3f200000 {
        compatible = "dmem-uio";
        reg = < 0x0 0x3f200000 0x0 0x200000>;
    };

    dmabuf3@3f400000 {
        compatible = "dmem-uio";
        reg = < 0x0 0x3f400000 0x0 0x200000>;
    };

    linuxbuf1@3f600000 {
        compatible = "dmem-uio";
        reg = < 0x0 0x3f600000 0x0 0x200000>;
    };

    linuxbuf2@3f80000 {
        compatible = "dmem-uio";
        reg = < 0x0 0x3f800000 0x0 0x200000>;
    };

    linuxbuf3@3fa00000 {
        compatible = "dmem-uio";
        reg = < 0x0 0x3fa00000 0x0 0x200000>;
    };
};

Please, note that I modified tcm addresses due to have large heap and stack sizes, as seen in the lscript configuration below (needed to deal with large arrays of data):

_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x30000;
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x30000;

MEMORY { psu_ddr_S_AXI_BASEADDR : ORIGIN = 0x3E000000, LENGTH = 0x01000000 psu_ocm_ram_1_S_AXI_BASEADDR : ORIGIN = 0xFFFF0000, LENGTH = 0x00010000 psu_r5_tcm_ram_0_S_AXI_BASEADDR : ORIGIN = 0x00000000, LENGTH = 0x00100000 psu_r5_tcm_ram_1_S_AXI_BASEADDR : ORIGIN = 0x00100000, LENGTH = 0x00100000 }

and rsc_table.c:

#define NUM_VRINGS 0x02
#define VRING_ALIGN 0x1000
#define RING_TX 0x3FE40000
#define RING_RX 0x3FE44000
#define VRING_SIZE 256

...

{RSC_RPROC_MEM, 0x3fe40000, 0x3fe40000, 0x100000, 0},

Any suggestion will be highly appreciated.

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Accepted Solutions
amsanchez
Contributor
Contributor
963 Views
Registered: ‎03-03-2017

Instead of modifying TCM addresses, which I think it can't be done (as seen in UG1085), I just moved heap and stack to psu_ddr_S_AXI_BASEADDR in lscript.ld.

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amsanchez
Contributor
Contributor
964 Views
Registered: ‎03-03-2017

Instead of modifying TCM addresses, which I think it can't be done (as seen in UG1085), I just moved heap and stack to psu_ddr_S_AXI_BASEADDR in lscript.ld.

View solution in original post