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Observer martinhaag
Observer
400 Views

Linux hangs on Zynq Ultrascale+ SRST reset when both RPUs are programmed via remoteproc

We have a working ZynqMP board with PCI interface. The PCI reset is connected to the SOC reset input. 

 

I can observe how the on board Linux system reboots when I generate the PCI reset.

I am able to load RPU0 or RPU1 firmware through remoteproc without any impact. If I do however load both RPU firmwares through remoteproc the Linux system hangs as soon as the reset signal is stimulated. 

 

Any ideas on this are welcome.

 

Linux: 4.9.0 / xilinx-v2017.2

FSBL: 2017.4

PMU FW: 2017.4

ATF: 2017.4 / v1.3

 

Attached are the related device tree portions.

 

	rpu_r5_0: zynqmp_r5_rproc.0@ff9a0100 {
		compatible = "xlnx,zynqmp-r5-remoteproc-1.0";
		reg = <0x0 0xff9a0100 0x0 0x100>, <0x0 0xff340000 0x0 0x100>, <0x0 0xff9a0000 0x0 0x100>;
		reg-names = "rpu_base", "ipi", "rpu_glbl_base";
		dma-ranges;
		core_conf = "split0";
		sram_0 = <&r5_0_tcm_a>;
		sram_1 = <&r5_0_tcm_b>;
		sram_2 = <&elf_ddr_0>;
		pd-handle = <&pd_r5_0>;
		interrupt-parent = <&gic>;
		interrupts = <0 29 4>;
	};
	
	rpu_r5_1: zynqmp_r5_rproc.1@ff9a0200 {
		compatible = "xlnx,zynqmp-r5-remoteproc-1.0";
		reg = <0x0 0xff9a0200 0x0 0x100>, <0x0 0xff350000 0x0 0x100>, <0x0 0xff9a0000 0x0 0x100>;
		reg-names = "rpu_base", "ipi", "rpu_glbl_base";
		dma-ranges;
		core_conf = "split1";
		sram_0 = <&r5_1_tcm_a>;
		sram_1 = <&r5_1_tcm_b>;
		sram_2 = <&elf_ddr_0>;
		pd-handle = <&pd_r5_1>;
		interrupt-parent = <&gic>;
		interrupts = <0 29 4>;
	};

 

 

&amba {
	power-domains {
		/* See XPmNodeId in UltraScale SW-Dev manual for pd-id values*/
		pd_r5_0: pd_r5_0 {
			#power-domain-cells = <0x0>;
			pd-id = <0x7>;
		};  
		pd_r5_1: pd_r5_1 {
			#power-domain-cells = <0x0>;
			pd-id = <0x8>;
		};  
		pd_tcm_0_a: pd_tcm_0_a {
			#power-domain-cells = <0x0>;
			pd-id = <0xf>;
		};  
		pd_tcm_1_a: pd_tcm_1_a {
			#power-domain-cells = <0x0>;
			pd-id = <0x11>;
		};  
		pd_tcm_0_b: pd_tcm_0_b {
			#power-domain-cells = <0x0>;
			pd-id = <0x10>;
		};
		pd_tcm_1_b: pd_tcm_1_b {
			#power-domain-cells = <0x0>;
			pd-id = <0x12>;
		};
	};  	
	
	r5_0_tcm_a: tcm@ffe00000 {
		compatible = "mmio-sram";
		reg = <0x0 0xFFE00000 0x0 0x10000>;
		pd-handle = <&pd_tcm_0_a>;
	};  
	
	r5_0_tcm_b: tcm@ffe20000 {
		compatible = "mmio-sram";
		reg = <0x0 0xFFE20000 0x0 0x10000>;
		pd-handle = <&pd_tcm_0_b>;
	};  
	
	r5_1_tcm_a: tcm@ffe90000 {
		compatible = "mmio-sram";
		reg = <0x0 0xFFE90000 0x0 0x10000>;
		pd-handle = <&pd_tcm_1_a>;
	};  
	
	r5_1_tcm_b: tcm@ffeb0000 {
		compatible = "mmio-sram";
		reg = <0x0 0xFFEB0000 0x0 0x10000>;
		pd-handle = <&pd_tcm_1_b>;
	};  
	
	elf_ddr_0: ddr@4e000000 {
		compatible = "mmio-sram";
		reg = <0x0 0x4E000000 0x0 0x0>;
	};  
};


 

 

 

 

 

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3 Replies
Moderator
Moderator
370 Views

Re: Linux hangs on Zynq Ultrascale+ SRST reset when both RPUs are programmed via remoteproc

Hi Martin,

 

Why are you not using Linux kernel xilinx-v2017.4? We recommend having the same versions for fsbl, atf, u-boot and linux. 

 

For 2017.2, the device-tree node that you have for rpu1 for ipi entry is incorrect. Please look at the openamp-overlay-split.dtsi here for an example 

https://github.com/Xilinx/meta-openamp/blob/rel-v2017.2/recipes-bsp/device-tree/files/zynqmp/openamp-overlay-split.dtsi

 

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Observer martinhaag
Observer
287 Views

Re: Linux hangs on Zynq Ultrascale+ SRST reset when both RPUs are programmed via remoteproc

Thanks @jovitac for the IPI hint. Unfortunately this did not solve the problem.

 

I am working with Kernel 2017.2 because we have a lot of products based on Zynq and ZynqMP and we try to maintain a common Kernel baseline which is quite difficult.

 

 

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Observer martinhaag
Observer
280 Views

Re: Linux hangs on Zynq Ultrascale+ SRST reset when both RPUs are programmed via remoteproc

In the meantime I created an upstream merge and tested xilinx-v2017.4 with the same result. 

 

SoC still hangs on reset.

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