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Explorer
Explorer
4,551 Views
Registered: ‎03-31-2016

7-series transceiver 8b/10b comma alignment issue

Hello

 

I want to used 7-series transceiver IP, and used 8b/10b option.

 

In my test design, GTX can't alignment data.

 

The comma alignment will used K28.5 standard.

 

How to resolve this issue?

 

 

Simulation: Behavior

FPGA device: XC7V2000T
Vivado version: 2016.4

sysclk: 60MHz
Reference Clock: 156.25MHz
RX/TX Line Rate: 3.125Gbps

 

design.JPG

 

alignment.JPGLine_Rate.JPGClock.JPG

Comma_Alignment.JPG

 K28.jpg

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Xilinx Employee
Xilinx Employee
4,542 Views
Registered: ‎08-07-2007

hi,

 

On the Comma alignment page, did you deselect RXSLIDE and check ENPCOMMANALIGN and ENMCOMMAALIGN ports in the Optional Ports window?

 

If not, please do that and regenerate the IP.

 

Thanks,

Boris

 

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Explorer
Explorer
4,537 Views
Registered: ‎03-31-2016

Hello @borisq

 

In 7-series transceiver wizard, RXSLIDE and check ENPCOMMANALIGN and ENMCOMMAALIGN ports not enable, than comma alignment is also not success.

 

rxslide.JPG

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Xilinx Employee
Xilinx Employee
4,518 Views
Registered: ‎08-07-2007

as said, you have to enable ENPCOMMAALIGN and ENMCOMMAALIGN.

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Explorer
Explorer
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Registered: ‎03-31-2016

Hello @borisq

 

The ENPCOMMAALIGN and ENMCOMMAALIGN is enables, but GTX is also not alignment.

 

How to resolve this issue?

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Xilinx Employee
Xilinx Employee
4,491 Views
Registered: ‎08-07-2007

please show me the waveform with the following signals:

ENPCOMMAALIGN

ENMCOMMAALIGN

RXDATA

RXCHARISK

RXCOMMADET

RXBYTEREALIGN

RXBYTEISALIGNED

RXCHARISCOMMA

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Explorer
Explorer
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Registered: ‎03-31-2016

Hello @borisq

 

In the below, there signals will dump to waveform.

 

waveform2.JPG

 

waveform1.JPG

 

 

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Xilinx Employee
Xilinx Employee
4,458 Views
Registered: ‎08-07-2007

rxcommadet doesn't go high. this indicates the comma is not detected.

 

when you send TXDATA=01bc, did you set TXCHARISK to 2'b01 in the same TXUSRCLK2 cycle?

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Explorer
Explorer
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Registered: ‎03-31-2016

Hello @borisq

 

I will follow your recommand.

When TXDATA=01bc, than TXCHARISK is setting 2'b01.

In this waveform, the rxcommadet to high, it mean comma detect, but not success to alignment.

 

waveform3.JPG

 

waveform4.JPG

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Xilinx Employee
Xilinx Employee
4,447 Views
Registered: ‎08-07-2007

I see comma alignment is successful because rxbyteisaligned goes high and keeps high. rxcommadet and rxbyterealign pulses also indicate a detection and alignment is done. 

something strange is rxdisperr. what about rxbufstatus?

 

something wrong in your design.

please run the simulation with example design generated automatically.

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Xilinx Employee
Xilinx Employee
4,634 Views
Registered: ‎08-07-2007

what about rxresetdone?

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Explorer
Explorer
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Registered: ‎03-31-2016

Hello @borisq

 

The rxresetdone is High.

 

waveform6.JPG

 

waveform5.JPG

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Xilinx Employee
Xilinx Employee
4,625 Views
Registered: ‎08-07-2007

i see the problem.

you set TXCHARISK to 2'b01 permanently. this is incorrect.

you should set TXCHARISK to 2'b01 in the TXUSRCLK2 cycle when you sent xxBC.

when you send regular data, it should be 00.

 

TXCHARISK[0]=1 indicates TXDATA[7:0] is K char.

TXCHARISK[1]=1 indicates TXDATA[15:8] is K char.

 

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Explorer
Explorer
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Registered: ‎03-31-2016

Hello @borisq

 

In this waveform, when TXDATA sent xxbc, than TXCHARISK will sent 2'b01.

 

In this condition, GTX also not alignment.

 

waveform7.JPG

 

waveform8.JPG

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Xilinx Employee
Xilinx Employee
4,605 Views
Registered: ‎08-07-2007

txcharisk belongs to TXUSRCLK2 clock domain.

why is it longer than one period?

 

txcharisk and txdata is sampled by the same rising of TXUSRCLK2.

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Explorer
Explorer
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Registered: ‎03-31-2016

Hello @borisq

 

The txcharisk and txdata are relatation TXUSRCLK2 clock domain, but not alignment.

 

Anything setting not check?

 

waveform9.JPG

 

waveform10.JPG

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Xilinx Employee
Xilinx Employee
4,596 Views
Registered: ‎08-07-2007

txcharisk still wrong.

 

for example, when you send TXDATA=01bd, then txcharisk should be 00, but in the simulation it is 10.

when you send 01bf, txcharisk should be00 but you set it to 01

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Explorer
Explorer
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Registered: ‎03-31-2016

Hello @borisq

 

The GTX still not alignment

 

waveform11.JPG

 

waveform12.JPG

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Xilinx Employee
Xilinx Employee
4,569 Views
Registered: ‎08-07-2007

this time the waveform looks good.

 

you should look at the data several cycles after rxbyteisaligned goes high.

 

before it goes high, the comma is not detected so the data is not aligned.

 

the data is aligned after several cycles after rxbyteisaligned being high.

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Explorer
Explorer
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Registered: ‎03-31-2016

Hello  @borisq

 

Thanks for your help!!!

 

In my design, GTX can be successed to alognment, but must in post-implementation timing simulation.

 

In behavior simulation can not alignment.

 

This issue is correct?

 

full_waveform.JPG

 

waveform1.JPG

 

waveform2.JPG

 

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