07-12-2017 08:06 PM - edited 07-12-2017 08:11 PM
I want to used 7-series transceiver IP, and used 8b/10b option.
In my test design, GTX can't alignment data.
The comma alignment will used K28.5 standard.
How to resolve this issue?
FPGA device: XC7V2000T
Vivado version: 2016.4
Reference Clock: 156.25MHz
RX/TX Line Rate: 3.125Gbps
07-12-2017 08:20 PM
On the Comma alignment page, did you deselect RXSLIDE and check ENPCOMMANALIGN and ENMCOMMAALIGN ports in the Optional Ports window?
If not, please do that and regenerate the IP.
07-12-2017 08:40 PM
07-12-2017 10:45 PM
as said, you have to enable ENPCOMMAALIGN and ENMCOMMAALIGN.
07-13-2017 02:02 AM
please show me the waveform with the following signals:
07-13-2017 07:23 PM
rxcommadet doesn't go high. this indicates the comma is not detected.
when you send TXDATA=01bc, did you set TXCHARISK to 2'b01 in the same TXUSRCLK2 cycle?
07-13-2017 07:42 PM - edited 07-13-2017 07:45 PM
07-13-2017 07:49 PM
I see comma alignment is successful because rxbyteisaligned goes high and keeps high. rxcommadet and rxbyterealign pulses also indicate a detection and alignment is done.
something strange is rxdisperr. what about rxbufstatus?
something wrong in your design.
please run the simulation with example design generated automatically.
07-13-2017 07:52 PM
what about rxresetdone?
07-13-2017 08:29 PM
i see the problem.
you set TXCHARISK to 2'b01 permanently. this is incorrect.
you should set TXCHARISK to 2'b01 in the TXUSRCLK2 cycle when you sent xxBC.
when you send regular data, it should be 00.
TXCHARISK=1 indicates TXDATA[7:0] is K char.
TXCHARISK=1 indicates TXDATA[15:8] is K char.
07-13-2017 11:29 PM
txcharisk belongs to TXUSRCLK2 clock domain.
why is it longer than one period?
txcharisk and txdata is sampled by the same rising of TXUSRCLK2.
07-14-2017 12:07 AM - edited 07-14-2017 12:08 AM
07-14-2017 12:12 AM
txcharisk still wrong.
for example, when you send TXDATA=01bd, then txcharisk should be 00, but in the simulation it is 10.
when you send 01bf, txcharisk should be00 but you set it to 01
07-14-2017 02:21 AM
this time the waveform looks good.
you should look at the data several cycles after rxbyteisaligned goes high.
before it goes high, the comma is not detected so the data is not aligned.
the data is aligned after several cycles after rxbyteisaligned being high.
07-17-2017 02:54 AM
Thanks for your help!!!
In my design, GTX can be successed to alognment, but must in post-implementation timing simulation.
In behavior simulation can not alignment.
This issue is correct?